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[Qemu-devel] [PULL 36/65] target-unicore32: Use clz opcode
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 36/65] target-unicore32: Use clz opcode |
Date: |
Tue, 10 Jan 2017 18:17:51 -0800 |
Signed-off-by: Richard Henderson <address@hidden>
---
target/unicore32/helper.c | 10 ----------
target/unicore32/helper.h | 3 ---
target/unicore32/translate.c | 6 +++---
3 files changed, 3 insertions(+), 16 deletions(-)
diff --git a/target/unicore32/helper.c b/target/unicore32/helper.c
index d603bde..7a5613e 100644
--- a/target/unicore32/helper.c
+++ b/target/unicore32/helper.c
@@ -32,16 +32,6 @@ UniCore32CPU *uc32_cpu_init(const char *cpu_model)
return UNICORE32_CPU(cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model));
}
-uint32_t HELPER(clo)(uint32_t x)
-{
- return clo32(x);
-}
-
-uint32_t HELPER(clz)(uint32_t x)
-{
- return clz32(x);
-}
-
#ifndef CONFIG_USER_ONLY
void helper_cp0_set(CPUUniCore32State *env, uint32_t val, uint32_t creg,
uint32_t cop)
diff --git a/target/unicore32/helper.h b/target/unicore32/helper.h
index 9418137..a4a5d45 100644
--- a/target/unicore32/helper.h
+++ b/target/unicore32/helper.h
@@ -13,9 +13,6 @@ DEF_HELPER_3(cp0_get, i32, env, i32, i32)
DEF_HELPER_1(cp1_putc, void, i32)
#endif
-DEF_HELPER_1(clz, i32, i32)
-DEF_HELPER_1(clo, i32, i32)
-
DEF_HELPER_2(exception, void, env, i32)
DEF_HELPER_3(asr_write, void, env, i32, i32)
diff --git a/target/unicore32/translate.c b/target/unicore32/translate.c
index 514d460..666a201 100644
--- a/target/unicore32/translate.c
+++ b/target/unicore32/translate.c
@@ -1479,10 +1479,10 @@ static void do_misc(CPUUniCore32State *env,
DisasContext *s, uint32_t insn)
/* clz */
tmp = load_reg(s, UCOP_REG_M);
if (UCOP_SET(26)) {
- gen_helper_clo(tmp, tmp);
- } else {
- gen_helper_clz(tmp, tmp);
+ /* clo */
+ tcg_gen_not_i32(tmp, tmp);
}
+ tcg_gen_clzi_i32(tmp, tmp, 32);
store_reg(s, UCOP_REG_D, tmp);
return;
}
--
2.9.3
- [Qemu-devel] [PULL 26/65] disas/ppc: Handle popcnt and cnttz, (continued)
- [Qemu-devel] [PULL 26/65] disas/ppc: Handle popcnt and cnttz, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 25/65] disas/i386.c: Handle tzcnt, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 27/65] target-alpha: Use the ctz and clz opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 29/65] target-microblaze: Use clz opcode, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 28/65] target-cris: Use clz opcode, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 24/65] tcg: Add clz and ctz opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 30/65] target-mips: Use clz opcode, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 31/65] target-openrisc: Use clz and ctz opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 34/65] target-tilegx: Use clz and ctz opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 33/65] target-s390x: Use clz opcode, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 36/65] target-unicore32: Use clz opcode,
Richard Henderson <=
- [Qemu-devel] [PULL 38/65] target-arm: Use clz opcode, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 32/65] target-ppc: Use clz and ctz opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 35/65] target-tricore: Use clz opcode, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 37/65] target-xtensa: Use clz opcode, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 39/65] target-i386: Use clz and ctz opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 41/65] tcg/aarch64: Handle ctz and clz opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 40/65] tcg/ppc: Handle ctz and clz opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 42/65] tcg/arm: Handle ctz and clz opcodes, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 43/65] tcg/mips: Handle clz opcode, Richard Henderson, 2017/01/10
- [Qemu-devel] [PULL 44/65] tcg/s390: Handle clz opcode, Richard Henderson, 2017/01/10