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[Qemu-devel] [PULL 14/30] target-sparc: fix immediate UA2005 traps
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 14/30] target-sparc: fix immediate UA2005 traps |
Date: |
Wed, 11 Jan 2017 18:55:50 -0800 |
From: Artyom Tarasenko <address@hidden>
Signed-off-by: Artyom Tarasenko <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/sparc/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 7e399a3..23d4673 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -3298,7 +3298,7 @@ static void disas_sparc_insn(DisasContext * dc, unsigned
int insn)
rs1 = GET_FIELD_SP(insn, 14, 18);
if (IS_IMM) {
- rs2 = GET_FIELD_SP(insn, 0, 6);
+ rs2 = GET_FIELD_SP(insn, 0, 7);
if (rs1 == 0) {
tcg_gen_movi_i32(trap, (rs2 & mask) + TT_TRAP);
/* Signal that the trap value is fully constant. */
--
2.9.3
- [Qemu-devel] [PULL 04/30] target-sparc: add UA2005 TTE bit #defines, (continued)
- [Qemu-devel] [PULL 04/30] target-sparc: add UA2005 TTE bit #defines, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 05/30] target-sparc: add UltraSPARC T1 TLB #defines, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 06/30] target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor mode, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 07/30] target-sparc: simplify replace_tlb_entry by using TTE_PGSIZE, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 08/30] target-sparc: implement UA2005 scratchpad registers, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 09/30] target-sparc: implement UltraSPARC-T1 Strand status ASR, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 10/30] target-sparc: hypervisor mode takes over nucleus mode, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 11/30] target-sparc: implement UA2005 hypervisor traps, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 12/30] target-sparc: implement UA2005 GL register, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 13/30] target-sparc: implement UA2005 rdhpstate and wrhpstate instructions, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 14/30] target-sparc: fix immediate UA2005 traps,
Richard Henderson <=
- [Qemu-devel] [PULL 15/30] target-sparc: use direct address translation in hyperprivileged mode, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 16/30] target-sparc: allow priveleged ASIs in hyperprivileged mode, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 17/30] target-sparc: ignore writes to UA2005 CPU mondo queue register, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 18/30] target-sparc: replace the last tlb entry when no free entries left, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 19/30] target-sparc: use SparcV9MMU type for sparc64 I/D-MMUs, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 20/30] target-sparc: implement UA2005 TSB Pointers, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 21/30] target-sparc: simplify ultrasparc_tsb_pointer, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 22/30] target-sparc: allow 256M sized pages, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 23/30] target-sparc: implement auto-demapping for UA2005 CPUs, Richard Henderson, 2017/01/11
- [Qemu-devel] [PULL 24/30] target-sparc: add more registers to dump_mmu, Richard Henderson, 2017/01/11