Re: [Qemu-devel] [PULL 00/30] target-sparc sun4v support

[no-reply]

Hi,

Your series seems to have some coding style problems. See output below for
more information:

Type: series
Subject: [Qemu-devel] [PULL 00/30] target-sparc sun4v support
Message-id: address@hidden

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

# Useful git options
git config --local diff.renamelimit 0
git config --local diff.renames True

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
7d3cf9d target-sparc: fix up niagara machine
abfad1a target-sparc: move common cpu initialisation routines to sparc64.c
57333d8 target-sparc: implement sun4v RTC
f8e7d50 target-sparc: add ST_BLKINIT_ ASIs for UA2005+ CPUs
32937ab target-sparc: store the UA2005 entries in sun4u format
eca6f23 target-sparc: implement UA2005 ASI_MMU (0x21)
ef03814 target-sparc: add more registers to dump_mmu
98cdf38 target-sparc: implement auto-demapping for UA2005 CPUs
7c98335 target-sparc: allow 256M sized pages
a4e5910 target-sparc: simplify ultrasparc_tsb_pointer
7a5e769 target-sparc: implement UA2005 TSB Pointers
f71d452 target-sparc: use SparcV9MMU type for sparc64 I/D-MMUs
9fcaf5d target-sparc: replace the last tlb entry when no free entries left
d55eadf target-sparc: ignore writes to UA2005 CPU mondo queue register
76921c1 target-sparc: allow priveleged ASIs in hyperprivileged mode
2458c87 target-sparc: use direct address translation in hyperprivileged mode
bdbbc43 target-sparc: fix immediate UA2005 traps
cbf8ac9 target-sparc: implement UA2005 rdhpstate and wrhpstate instructions
0b34856 target-sparc: implement UA2005 GL register
e7061b6 target-sparc: implement UA2005 hypervisor traps
53f02e5 target-sparc: hypervisor mode takes over nucleus mode
7cda3fa target-sparc: implement UltraSPARC-T1 Strand status ASR
eb1f484 target-sparc: implement UA2005 scratchpad registers
64665df target-sparc: simplify replace_tlb_entry by using TTE_PGSIZE
ab350d2 target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in 
hypervisor mode
1e66c22 target-sparc: add UltraSPARC T1 TLB #defines
3c44177 target-sparc: add UA2005 TTE bit #defines
6fab442 target-sparc: use explicit mmu register pointers
c8d2b8a target-sparc: store cpu super- and hypervisor flags in TB
8db73e2 target-sparc: ignore MMU-faults if MMU is disabled in hypervisor mode

=== OUTPUT BEGIN ===
Checking PATCH 1/30: target-sparc: ignore MMU-faults if MMU is disabled in 
hypervisor mode...
Checking PATCH 2/30: target-sparc: store cpu super- and hypervisor flags in 
TB...
Checking PATCH 3/30: target-sparc: use explicit mmu register pointers...
Checking PATCH 4/30: target-sparc: add UA2005 TTE bit #defines...
Checking PATCH 5/30: target-sparc: add UltraSPARC T1 TLB #defines...
Checking PATCH 6/30: target-sparc: on UA2005 don't deliver Interrupt_level_n 
IRQs in hypervisor mode...
Checking PATCH 7/30: target-sparc: simplify replace_tlb_entry by using 
TTE_PGSIZE...
Checking PATCH 8/30: target-sparc: implement UA2005 scratchpad registers...
ERROR: code indent should never use tabs
#19: FILE: target/sparc/asi.h:214:
+#define ASI_HYP_SCRATCHPAD^I0x4f /* (4V) Hypervisor scratchpad^I*/$

total: 1 errors, 0 warnings, 50 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 9/30: target-sparc: implement UltraSPARC-T1 Strand status ASR...
Checking PATCH 10/30: target-sparc: hypervisor mode takes over nucleus mode...
Checking PATCH 11/30: target-sparc: implement UA2005 hypervisor traps...
Checking PATCH 12/30: target-sparc: implement UA2005 GL register...
Checking PATCH 13/30: target-sparc: implement UA2005 rdhpstate and wrhpstate 
instructions...
Checking PATCH 14/30: target-sparc: fix immediate UA2005 traps...
Checking PATCH 15/30: target-sparc: use direct address translation in 
hyperprivileged mode...
Checking PATCH 16/30: target-sparc: allow priveleged ASIs in hyperprivileged 
mode...
Checking PATCH 17/30: target-sparc: ignore writes to UA2005 CPU mondo queue 
register...
Checking PATCH 18/30: target-sparc: replace the last tlb entry when no free 
entries left...
Checking PATCH 19/30: target-sparc: use SparcV9MMU type for sparc64 I/D-MMUs...
Checking PATCH 20/30: target-sparc: implement UA2005 TSB Pointers...
Checking PATCH 21/30: target-sparc: simplify ultrasparc_tsb_pointer...
Checking PATCH 22/30: target-sparc: allow 256M sized pages...
Checking PATCH 23/30: target-sparc: implement auto-demapping for UA2005 CPUs...
Checking PATCH 24/30: target-sparc: add more registers to dump_mmu...
Checking PATCH 25/30: target-sparc: implement UA2005 ASI_MMU (0x21)...
Checking PATCH 26/30: target-sparc: store the UA2005 entries in sun4u format...
ERROR: suspect code indent for conditional statements (6, 10)
#105: FILE: target/sparc/ldst_helper.c:1725:
+      if (!(addr & TLB_UST1_IS_REAL_BIT)) {
+          replace_tlb_1bit_lru(env->dtlb, env->dmmu.tag_access,

total: 1 errors, 0 warnings, 94 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 27/30: target-sparc: add ST_BLKINIT_ ASIs for UA2005+ CPUs...
Checking PATCH 28/30: target-sparc: implement sun4v RTC...
ERROR: do not use C99 // comments
#61: FILE: hw/timer/sun4v-rtc.c:18:
+//#define DEBUG_SUN4V_RTC

total: 1 errors, 0 warnings, 120 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 29/30: target-sparc: move common cpu initialisation routines to 
sparc64.c...
ERROR: do not use C99 // comments
#58: FILE: hw/sparc64/sparc64.c:33:
+//#define DEBUG_IRQ

ERROR: do not use C99 // comments
#59: FILE: hw/sparc64/sparc64.c:34:
+//#define DEBUG_TIMER

total: 2 errors, 0 warnings, 796 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 30/30: target-sparc: fix up niagara machine...
=== OUTPUT END ===

Test command exited with code: 1


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