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Re: [Qemu-devel] [PATCH 03/11] target-ppc: Add xsiexpdp instruction


From: David Gibson
Subject: Re: [Qemu-devel] [PATCH 03/11] target-ppc: Add xsiexpdp instruction
Date: Thu, 12 Jan 2017 16:11:51 +1100
User-agent: Mutt/1.7.1 (2016-10-04)

On Thu, Jan 12, 2017 at 10:23:22AM +0530, Nikunj A Dadhania wrote:
> David Gibson <address@hidden> writes:
> 
> > [ Unknown signature status ]
> > On Tue, Jan 10, 2017 at 02:20:35PM +0530, Nikunj A Dadhania wrote:
> >> xsiexpdp: VSX Scalar Insert Exponent Double Precision
> >> 
> >> Signed-off-by: Nikunj A Dadhania <address@hidden>
> >> ---
> >>  target/ppc/translate/vsx-impl.inc.c | 20 ++++++++++++++++++++
> >>  target/ppc/translate/vsx-ops.inc.c  |  1 +
> >>  2 files changed, 21 insertions(+)
> >> 
> >> diff --git a/target/ppc/translate/vsx-impl.inc.c 
> >> b/target/ppc/translate/vsx-impl.inc.c
> >> index 2d9fe50..2d09225 100644
> >> --- a/target/ppc/translate/vsx-impl.inc.c
> >> +++ b/target/ppc/translate/vsx-impl.inc.c
> >> @@ -1243,6 +1243,26 @@ static void gen_xsxexpqp(DisasContext *ctx)
> >>      tcg_gen_movi_i64(xtl, 0);
> >>  }
> >>  
> >> +static void gen_xsiexpdp(DisasContext *ctx)
> >> +{
> >> +    TCGv_i64 xth = cpu_vsrh(xT(ctx->opcode));
> >> +    TCGv ra = cpu_gpr[rA(ctx->opcode)];
> >> +    TCGv rb = cpu_gpr[rB(ctx->opcode)];
> >> +    TCGv_i64 t0;
> >> +
> >> +    if (unlikely(!ctx->vsx_enabled)) {
> >> +        gen_exception(ctx, POWERPC_EXCP_VSXU);
> >> +        return;
> >> +    }
> >> +    t0 = tcg_temp_new_i64();
> >> +    tcg_gen_andi_i64(xth, ra, 0x800FFFFFFFFFFFFF);
> >> +    tcg_gen_andi_i64(t0, rb, 0x7FF);
> >> +    tcg_gen_shli_i64(t0, t0, 52);
> >> +    tcg_gen_or_i64(xth, xth, t0);
> >> +    /* dword[1] is undefined */
> >
> > According to the ISA doc I have, dword[1] is set to 0 rather than
> > being undefined.
> 
> Referring to xsiexpdp on page 570:
> 
> "The contents of doubleword element 1 of VSR[XT] are
> undefined."
> 
> The revision that I have is dated November 30, 2015

Ah, sorry.  I think I just misread all those "U"s in the pseudo-code
as "0"s.  I'll blame the fact I'm using the little laptop screen,
since I've left my home office to escape the heat.

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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