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[Qemu-devel] [PATCH v3 0/5] Fixes for target/m68k
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH v3 0/5] Fixes for target/m68k |
Date: |
Fri, 13 Jan 2017 19:36:28 +0100 |
This is a series of fixes for target/m68k found:
- with RISU (bit operation with immediate)
- while debugging package build under chroot
(gen_flush_flags() and CAS address modes)
- while I was working on the softmmu mode
(CAS alignment and SP address modes)
v2:
- Don't align stack access on coldfire.
v3:
- Fix v2 :( that has introduced a subi instead of
an addi
Laurent Vivier (5):
target-m68k: fix bit operation with immediate value
target-m68k: fix gen_flush_flags()
target-m68k: manage pre-dec et post-inc in CAS
target-m68k: CAS doesn't need aligned access
target-m68k: increment/decrement with SP
target/m68k/translate.c | 40 +++++++++++++++++++++++++++++++++-------
1 file changed, 33 insertions(+), 7 deletions(-)
--
2.7.4
- [Qemu-devel] [PATCH v3 0/5] Fixes for target/m68k,
Laurent Vivier <=
- [Qemu-devel] [PATCH v3 1/5] target-m68k: fix bit operation with immediate value, Laurent Vivier, 2017/01/13
- [Qemu-devel] [PATCH v3 4/5] target-m68k: CAS doesn't need aligned access, Laurent Vivier, 2017/01/13
- [Qemu-devel] [PATCH v3 3/5] target-m68k: manage pre-dec et post-inc in CAS, Laurent Vivier, 2017/01/13
- [Qemu-devel] [PATCH v3 2/5] target-m68k: fix gen_flush_flags(), Laurent Vivier, 2017/01/13
- [Qemu-devel] [PATCH v3 5/5] target-m68k: increment/decrement with SP, Laurent Vivier, 2017/01/13