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Re: [Qemu-devel] [PATCH for-2.9 27/30] wdt: Add Aspeed watchdog device m
From: |
Cédric Le Goater |
Subject: |
Re: [Qemu-devel] [PATCH for-2.9 27/30] wdt: Add Aspeed watchdog device model |
Date: |
Mon, 16 Jan 2017 18:14:04 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.6.0 |
On 11/29/2016 04:44 PM, Cédric Le Goater wrote:
> From: Joel Stanley <address@hidden>
>
> The Aspeed SoC includes a set of watchdog timers using 32-bit
> decrement counters, which can be based either on the APB clock or
> a 1 MHz clock.
>
> The watchdog timer is designed to prevent system deadlock and, in
> general, it should be restarted before timeout. When a timeout occurs,
> different types of signals can be generated, ARM reset, SOC reset,
> System reset, CPU Interrupt, external signal or boot from alternate
> block. The current model only performs the system reset function as
> this is used by U-Boot and Linux.
>
Shall I resend the 3/4 patches related to the watchdog in a separate
patchset ?
Thanks,
C.
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