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Re: [Qemu-devel] [PATCH v2 08/11] aspeed/smc: reset flash after each tes


From: mar.krzeminski
Subject: Re: [Qemu-devel] [PATCH v2 08/11] aspeed/smc: reset flash after each test
Date: Mon, 16 Jan 2017 19:19:00 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.5.1



W dniu 16.01.2017 o 19:10, Cédric Le Goater pisze:
On 01/16/2017 06:37 PM, mar.krzeminski wrote:

W dniu 09.01.2017 o 17:24, Cédric Le Goater pisze:
Let's make sure when each test is run that the flash object is in an
initial state and did not keep configuration from the previous tests.
Is there any particukar reason why you do that (bug/side effect/whatever) or you
just want to be sure what the flash state is?
I want to be sure it is not in 4BYTE mode.
There is a command for that (EX_4BYTE_ADDR = 0xE9), but reset also make sense here.

Thanks,
Marcin

C.

Thanks,
Marcin
Signed-off-by: Cédric Le Goater <address@hidden>
---
   tests/m25p80-test.c | 31 +++++++++++++++++++++++++++++++
   1 file changed, 31 insertions(+)

diff --git a/tests/m25p80-test.c b/tests/m25p80-test.c
index cb7ec81f1a6d..8dd550deb95e 100644
--- a/tests/m25p80-test.c
+++ b/tests/m25p80-test.c
@@ -50,6 +50,8 @@ enum {
       READ = 0x03,
       PP = 0x02,
       WREN = 0x6,
+    RESET_ENABLE = 0x66,
+    RESET_MEMORY = 0x99,
       EN_4BYTE_ADDR = 0xB7,
       ERASE_SECTOR = 0xd8,
   };
@@ -76,6 +78,14 @@ static void spi_conf(uint32_t value)
       writel(ASPEED_FMC_BASE + R_CONF, conf);
   }
   +static void spi_conf_remove(uint32_t value)
+{
+    uint32_t conf = readl(ASPEED_FMC_BASE + R_CONF);
+
+    conf &= ~value;
+    writel(ASPEED_FMC_BASE + R_CONF, conf);
+}
+
   static void spi_ctrl_start_user(void)
   {
       uint32_t ctrl = readl(ASPEED_FMC_BASE + R_CTRL0);
@@ -95,6 +105,18 @@ static void spi_ctrl_stop_user(void)
       writel(ASPEED_FMC_BASE + R_CTRL0, ctrl);
   }
   +static void flash_reset(void)
+{
+    spi_conf(CONF_ENABLE_W0);
+
+    spi_ctrl_start_user();
+    writeb(ASPEED_FLASH_BASE, RESET_ENABLE);
+    writeb(ASPEED_FLASH_BASE, RESET_MEMORY);
+    spi_ctrl_stop_user();
+
+    spi_conf_remove(CONF_ENABLE_W0);
+}
+
   static void test_read_jedec(void)
   {
       uint32_t jedec = 0x0;
@@ -108,6 +130,8 @@ static void test_read_jedec(void)
       jedec |= readb(ASPEED_FLASH_BASE);
       spi_ctrl_stop_user();
   +    flash_reset();
+
       g_assert_cmphex(jedec, ==, FLASH_JEDEC);
   }
   @@ -155,6 +179,8 @@ static void test_erase_sector(void)
       for (i = 0; i < PAGE_SIZE / 4; i++) {
           g_assert_cmphex(page[i], ==, 0xffffffff);
       }
+
+    flash_reset();
   }
     static void test_erase_all(void)
@@ -182,6 +208,8 @@ static void test_erase_all(void)
       for (i = 0; i < PAGE_SIZE / 4; i++) {
           g_assert_cmphex(page[i], ==, 0xffffffff);
       }
+
+    flash_reset();
   }
     static void test_write_page(void)
@@ -195,6 +223,7 @@ static void test_write_page(void)
         spi_ctrl_start_user();
       writeb(ASPEED_FLASH_BASE, EN_4BYTE_ADDR);
+    writeb(ASPEED_FLASH_BASE, WREN);
       writeb(ASPEED_FLASH_BASE, PP);
       writel(ASPEED_FLASH_BASE, make_be32(my_page_addr));
   @@ -215,6 +244,8 @@ static void test_write_page(void)
       for (i = 0; i < PAGE_SIZE / 4; i++) {
           g_assert_cmphex(page[i], ==, 0xffffffff);
       }
+
+    flash_reset();
   }
     static char tmp_path[] = "/tmp/qtest.m25p80.XXXXXX";





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