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[Qemu-devel] [PULL 11/41] hw/isa/lpc_ich9: add broadcast SMI feature
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 11/41] hw/isa/lpc_ich9: add broadcast SMI feature |
Date: |
Fri, 27 Jan 2017 14:45:19 +0100 |
From: Laszlo Ersek <address@hidden>
The generic edk2 SMM infrastructure prefers
EFI_SMM_CONTROL2_PROTOCOL.Trigger() to inject an SMI on each processor. If
Trigger() only brings the current processor into SMM, then edk2 handles it
in the following ways:
(1) If Trigger() is executed by the BSP (which is guaranteed before
ExitBootServices(), but is not necessarily true at runtime), then:
(a) If edk2 has been configured for "traditional" SMM synchronization,
then the BSP sends directed SMIs to the APs with APIC delivery,
bringing them into SMM individually. Then the BSP runs the SMI
handler / dispatcher.
(b) If edk2 has been configured for "relaxed" SMM synchronization,
then the APs that are not already in SMM are not brought in, and
the BSP runs the SMI handler / dispatcher.
(2) If Trigger() is executed by an AP (which is possible after
ExitBootServices(), and can be forced e.g. by "taskset -c 1
efibootmgr"), then the AP in question brings in the BSP with a
directed SMI, and the BSP runs the SMI handler / dispatcher.
The smaller problem with (1a) and (2) is that the BSP and AP
synchronization is slow. For example, the "taskset -c 1 efibootmgr"
command from (2) can take more than 3 seconds to complete, because
efibootmgr accesses non-volatile UEFI variables intensively.
The larger problem is that QEMU's current behavior diverges from the
behavior usually seen on physical hardware, and that keeps exposing
obscure corner cases, race conditions and other instabilities in edk2,
which generally expects / prefers a software SMI to affect all CPUs at
once.
Therefore introduce the "broadcast SMI" feature that causes QEMU to inject
the SMI on all VCPUs.
While the original posting of this patch
<http://lists.nongnu.org/archive/html/qemu-devel/2015-10/msg05658.html>
only intended to speed up (2), based on our recent "stress testing" of SMM
this patch actually provides functional improvements.
Cc: "Michael S. Tsirkin" <address@hidden>
Cc: Gerd Hoffmann <address@hidden>
Cc: Igor Mammedov <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Signed-off-by: Laszlo Ersek <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
hw/isa/lpc_ich9.c | 10 +++++++++-
include/hw/i386/ich9.h | 3 +++
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 376b780..ced6f80 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -437,7 +437,15 @@ static void ich9_apm_ctrl_changed(uint32_t val, void *arg)
/* SMI_EN = PMBASE + 30. SMI control and enable register */
if (lpc->pm.smi_en & ICH9_PMIO_SMI_EN_APMC_EN) {
- cpu_interrupt(current_cpu, CPU_INTERRUPT_SMI);
+ if (lpc->smi_negotiated_features &
+ (UINT64_C(1) << ICH9_LPC_SMI_F_BROADCAST_BIT)) {
+ CPUState *cs;
+ CPU_FOREACH(cs) {
+ cpu_interrupt(cs, CPU_INTERRUPT_SMI);
+ }
+ } else {
+ cpu_interrupt(current_cpu, CPU_INTERRUPT_SMI);
+ }
}
}
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index da11187..18dcca7 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -250,4 +250,7 @@ Object *ich9_lpc_find(void);
#define ICH9_SMB_HST_D1 0x06
#define ICH9_SMB_HOST_BLOCK_DB 0x07
+/* bit positions used in fw_cfg SMI feature negotiation */
+#define ICH9_LPC_SMI_F_BROADCAST_BIT 0
+
#endif /* HW_ICH9_H */
--
1.8.3.1
- [Qemu-devel] [PULL 00/41] Misc changes for 2017-01-27, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 03/41] replay: don't use rtc clock on loadvm phase, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 04/41] savevm: add public save_vmstate function, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 05/41] replay: save/load initial state, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 01/41] icount: update instruction counter on apic patching, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 02/41] replay: improve interrupt handling, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 06/41] replay: exception replay fix, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 07/41] apic: save apic_delivered flag, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 08/41] memory: tune mtree_print_mr() to dump mr type, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 12/41] hw/isa/lpc_ich9: negotiate SMI broadcast on pc-q35-2.9+ machine types, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 11/41] hw/isa/lpc_ich9: add broadcast SMI feature,
Paolo Bonzini <=
- [Qemu-devel] [PULL 13/41] block/iscsi: avoid data corruption with cache=writeback, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 09/41] memory: hmp: add "-f" for "info mtree", Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 10/41] hw/isa/lpc_ich9: add SMI feature negotiation via fw_cfg, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 14/41] Introduce DEVICE_CATEGORY_CPU for CPU devices, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 15/41] hw/scsi: Fix debug message of cdb structure in scsi-generic, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 17/41] block: get max_transfer limit for char (scsi-generic) devices, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 18/41] x86-KVM: Supply TSC and APIC clock rates to guest like VMWare, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 16/41] block: Fix target variable of BLKSECTGET ioctl, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 19/41] pc: Enable vmware-cpuid-freq CPU option for 2.9+ machine types, Paolo Bonzini, 2017/01/27
- [Qemu-devel] [PULL 23/41] char: add qemu_chr_fe_add_watch() Returns description, Paolo Bonzini, 2017/01/27