[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH v11 23/24] hw/misc/imx6_src: defer clearing of S
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v11 23/24] hw/misc/imx6_src: defer clearing of SRC_SCR reset bits |
Date: |
Fri, 10 Feb 2017 15:34:17 +0000 |
On 10 February 2017 at 15:19, Alex Bennée <address@hidden> wrote:
> Peter Maydell <address@hidden> writes:
>> I guess a malloc-and-free is OK since the guest isn't going to be
>> bouncing CPUs through reset very often, though it's a bit ugly to
>> see in device code.
>
> Previous patches had expanded the run_on_cpu code to have things like
> CPUState and a single field to avoid malloc where we can. However I need
> the IMX6SRCState and I don't know if I can get that in the work
> function. Will there only ever be one on the system?
In practice there will be only one but I don't think we should
rely on that. malloc/free is probably better than overly
convoluted code at this point.
thanks
-- PMM
- [Qemu-devel] [PATCH v11 07/24] tcg: rename tcg_current_cpu to tcg_current_rr_cpu, (continued)
- [Qemu-devel] [PATCH v11 07/24] tcg: rename tcg_current_cpu to tcg_current_rr_cpu, Alex Bennée, 2017/02/09
- [Qemu-devel] [PATCH v11 15/24] cputlb: introduce tlb_flush_* async work., Alex Bennée, 2017/02/09
- [Qemu-devel] [PATCH v11 16/24] cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap, Alex Bennée, 2017/02/09
- [Qemu-devel] [PATCH v11 19/24] cputlb: introduce tlb_flush_*_all_cpus[_synced], Alex Bennée, 2017/02/09
- [Qemu-devel] [PATCH v11 18/24] cputlb: atomically update tlb fields used by tlb_reset_dirty, Alex Bennée, 2017/02/09
- [Qemu-devel] [PATCH v11 21/24] target-arm: don't generate WFE/YIELD calls for MTTCG, Alex Bennée, 2017/02/09
- [Qemu-devel] [PATCH v11 17/24] cputlb: add tlb_flush_by_mmuidx async routines, Alex Bennée, 2017/02/09
- [Qemu-devel] [PATCH v11 23/24] hw/misc/imx6_src: defer clearing of SRC_SCR reset bits, Alex Bennée, 2017/02/09
- [Qemu-devel] [PATCH v11 24/24] tcg: enable MTTCG by default for ARM on x86 hosts, Alex Bennée, 2017/02/09
- [Qemu-devel] [PATCH v11 20/24] target-arm/powerctl: defer cpu reset work to CPU context, Alex Bennée, 2017/02/09
- [Qemu-devel] [PATCH v11 22/24] target-arm: ensure all cross vCPUs TLB flushes complete, Alex Bennée, 2017/02/09