Re: [Qemu-devel] [PATCH 2/2] risu_ppc64le: distinguish real illegal instruction

[Peter Maydell]

On 27 February 2017 at 05:33, Nikunj A Dadhania
<address@hidden> wrote:
> Peter Maydell <address@hidden> writes:
>
>> On 13 February 2017 at 08:59, Nikunj A Dadhania
>> <address@hidden> wrote:
>>> While executing qemu_ppc64le, found an issue that the real illegal
>>> instructions are handled as risu_op which results in wrong info at the
>>> master end. Even the master needs to distinguish real illegal
>>> instructions versus risu_op.
>>>
>>> Signed-off-by: Nikunj A Dadhania <address@hidden>
>>
>> No, this is deliberate. Otherwise you can't test illegal
>> instructions. What should happen is that both master and
>> apprentice ends end up in the default case, which does
>> a register info compare and continues having stepped the
>> PC past the illegal insn.
>
> One of the issue that I had was some of the instruction are implemented
> in the master and not in apprentice. I think we could then disable them
> in the ppc64.risu. And enable them only when we have that implemented it
> in qemu tcg.

Yes; if you haven't yet implemented an instruction the best
approach is just to not try to test it.

>> (If only one end thinks the insn is illegal then there will
>> be a register mismatch on the PC.)
>
> Yeah, the issue here was it does not come out obviously that there was a
> real illegal instruction. Maybe a error print at both the ends would
> help in debugging.

It should print "faulting insn mismatch" if the instructions which
fault aren't the same thing. This is what the arm and aarch64
implementations of reginfo_dump_mismatch() do, anyway. It looks
like the ppc and m68k versions don't do that, though.

thanks
-- PMM