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Re: [Qemu-devel] [PATCH v2 1/2] hw/arm/exynos: Fix Linux kernel division


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH v2 1/2] hw/arm/exynos: Fix Linux kernel division by zero for PLLs
Date: Mon, 27 Feb 2017 13:32:35 +0000

On 26 February 2017 at 20:01, Krzysztof Kozlowski <address@hidden> wrote:
> Without any clock controller, the Linux kernel was hitting division by
> zero during boot or with clk_summary:
> [    0.000000] [<c031054c>] (unwind_backtrace) from [<c030ba6c>] 
> (show_stack+0x10/0x14)
> [    0.000000] [<c030ba6c>] (show_stack) from [<c05b2660>] 
> (dump_stack+0x88/0x9c)
> [    0.000000] [<c05b2660>] (dump_stack) from [<c05b11a4>] (Ldiv0+0x8/0x10)
> [    0.000000] [<c05b11a4>] (Ldiv0) from [<c06ad1e0>] 
> (samsung_pll45xx_recalc_rate+0x58/0x74)
> [    0.000000] [<c06ad1e0>] (samsung_pll45xx_recalc_rate) from [<c0692ec0>] 
> (clk_register+0x39c/0x63c)
> [    0.000000] [<c0692ec0>] (clk_register) from [<c125d360>] 
> (samsung_clk_register_pll+0x2e0/0x3d4)
> [    0.000000] [<c125d360>] (samsung_clk_register_pll) from [<c125d7e8>] 
> (exynos4_clk_init+0x1b0/0x5e4)
> [    0.000000] [<c125d7e8>] (exynos4_clk_init) from [<c12335f4>] 
> (of_clk_init+0x17c/0x210)
> [    0.000000] [<c12335f4>] (of_clk_init) from [<c1204700>] 
> (time_init+0x24/0x2c)
> [    0.000000] [<c1204700>] (time_init) from [<c1200b2c>] 
> (start_kernel+0x24c/0x38c)
> [    0.000000] [<c1200b2c>] (start_kernel) from [<4020807c>] (0x4020807c)
>
> Provide stub for clock controller returning reset values for PLLs.
>
> Signed-off-by: Krzysztof Kozlowski <address@hidden>
>
> ---



Applied both to target-arm.next, thanks.

-- PMM



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