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Re: [Qemu-devel] [PATCH v4] target-s390x: Implement stfl and stfle


From: Richard Henderson
Subject: Re: [Qemu-devel] [PATCH v4] target-s390x: Implement stfl and stfle
Date: Thu, 2 Mar 2017 06:30:33 +1100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.0

On 03/01/2017 07:00 PM, Thomas Huth wrote:
Primarily, it does not raise an exception for error.

Protection and page faults should be generated properly via
trigger_access_exception() there ... or did I miss something?

So why does s390_cpu_virt_mem_rw document that it returns non-zero if there was an error?

I see you do raise an exception on the TCG path (via translate_pages), but not the KVM path. That is very confusing.

AR = Access Register ... they are needed when the CPU runs in access
register mode (i.e. the AS PSW bits are 01). AFAIK we don't emulate this
in QEMU yet, but the KVM_S390_MEM_OP ioctl already supports it.

Hmm.  I guess I don't know how to read that then.

Your writes need to look a lot more like fast_memmove in mem_helper.c,
except that of course only the destination needs translation.

I still think that s390_cpu_virt_mem_write() should be fine here, too.

Ideally you'd interact with the TCG TLB in some way so that you didn't have to manage your own translation and your own exceptions. That's what fast_memmove does.


Of course, in practice we could reduce this to just one cpu_stl_data for
STFL and one or two cpu_stq_data for STFLE.

I think STFLE can store more than two 64-bit words, can't it?

Technically, yes. But there are less than 128 bits defined. Certainly much less than the 4k bits that Michal prepares for.


r~



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