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[Qemu-devel] [PULL 08/17] target/ppc/POWER9: Add POWER9 pa-features defi
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 08/17] target/ppc/POWER9: Add POWER9 pa-features definition |
Date: |
Fri, 3 Mar 2017 14:24:58 +1100 |
From: Suraj Jitindar Singh <address@hidden>
Add a pa-features definition which includes all of the new fields which
have been added, note we don't claim support for any of these new features
at this stage.
Signed-off-by: Suraj Jitindar Singh <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Acked-by: Balbir Singh <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/spapr.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 1cc5e00..81e2ada 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -390,6 +390,20 @@ static void spapr_populate_pa_features(CPUPPCState *env,
void *fdt, int offset)
0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
+ /* Currently we don't advertise any of the "new" ISAv3.00 functionality */
+ uint8_t pa_features_300[] = { 64, 0,
+ 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
+ 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
+ 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
+ 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 24 - 29 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 - 35 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 36 - 41 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 42 - 47 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 48 - 53 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 54 - 59 */
+ 0x00, 0x00, 0x00, 0x00 }; /* 60 - 63 */
+
uint8_t *pa_features;
size_t pa_size;
@@ -404,6 +418,10 @@ static void spapr_populate_pa_features(CPUPPCState *env,
void *fdt, int offset)
pa_features = pa_features_207;
pa_size = sizeof(pa_features_207);
break;
+ case POWERPC_MMU_3_00:
+ pa_features = pa_features_300;
+ pa_size = sizeof(pa_features_300);
+ break;
default:
return;
}
--
2.9.3
- [Qemu-devel] [PULL 00/17] ppc-for-2.9 queue 20170303, David Gibson, 2017/03/02
- [Qemu-devel] [PULL 01/17] target/ppc: Add POWER9/ISAv3.00 to compat_table, David Gibson, 2017/03/02
- [Qemu-devel] [PULL 10/17] hw/ppc/spapr: Add POWER9 to pseries cpu models, David Gibson, 2017/03/02
- [Qemu-devel] [PULL 11/17] target/ppc: Add Instruction Authority Mask Register Check, David Gibson, 2017/03/02
- [Qemu-devel] [PULL 03/17] powernv: Don't test POWER9 CPU yet, David Gibson, 2017/03/02
- [Qemu-devel] [PULL 08/17] target/ppc/POWER9: Add POWER9 pa-features definition,
David Gibson <=
- [Qemu-devel] [PULL 09/17] target/ppc/POWER9: Add cpu_has_work function for POWER9, David Gibson, 2017/03/02
- [Qemu-devel] [PULL 14/17] target/ppc: Rework hash mmu page fault code and add defines for clarity, David Gibson, 2017/03/02
- [Qemu-devel] [PULL 02/17] exec, kvm, target-ppc: Move getrampagesize() to common code, David Gibson, 2017/03/02
- [Qemu-devel] [PULL 04/17] target/ppc/POWER9: Add POWERPC_MMU_V3 bit, David Gibson, 2017/03/02
- [Qemu-devel] [PULL 07/17] target/ppc/POWER9: Add POWER9 mmu fault handler, David Gibson, 2017/03/02
- [Qemu-devel] [PULL 15/17] spapr_pci: Advertise access to PCIe extended config space, David Gibson, 2017/03/02
- [Qemu-devel] [PULL 06/17] target/ppc: Don't gen an SDR1 on POWER9 and rework register creation, David Gibson, 2017/03/02
- [Qemu-devel] [PULL 05/17] target/ppc: Add patb_entry to sPAPRMachineState, David Gibson, 2017/03/02