Re: [Qemu-devel] [PATCH v5 0/9] ppc/pnv: interrupt controller (POWER8)

[David Gibson]

On Mon, Apr 03, 2017 at 09:45:56AM +0200, Cédric Le Goater wrote:
> Hello,
> 
> Here is a series adding support for the interrupt controller as found
> on a POWER8 system. POWER9 uses a different interrupt controller
> called XIVE, still to be worked on.
> 
> The initial patches are more cleanups of the XICS layer which move the
> IRQ 'server' number mapping under the machine handlers.
> 
> A new PnvICPState object based on MMIOs, which is specific to PowerNV,
> is introduced in XICS. These ICP objects are created for each thread
> of a core and linked to the associated PowerPCCPU object.
> 
> Finally, to make use of the XICS layer, the PowerNV machine is
> extended with a QOM XICSFabric interface and with a global memory
> region acting as the Interrupt Management area.
> 
> 
> To test, grab a kernel and a rootfs image here :
> 
>   
> https://openpower.xyz/job/openpower-op-build/distro=ubuntu,target=palmetto/lastSuccessfulBuild/artifact/images/zImage.epapr
>   
> https://openpower.xyz/job/openpower-op-build/distro=ubuntu,target=palmetto/lastSuccessfulBuild/artifact/images/rootfs.cpio.xz
> 
> The full patchset is available here :
> 
>    https://github.com/legoater/qemu/commits/powernv-ipmi-2.9
> 
> Thanks,

I've applied the series to my ppc-for-2.10 branch.  A couple of things
to think about for follow up cleanups:

1) The spapr->nr_servers field has very little remaining use; can you
   go a bit further and remove it entirely?

2) At the moment you're creating (and realizing) the ICP objects just
before you realize the core objects.  I'm not entirely sure if
creating new objects at realize time is QOMishly correct.  Maybe do
some more enquiries to see if it is or not, and if not update.

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

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