[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 20/24] arm: Move condition-failed codepath generation
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 20/24] arm: Move condition-failed codepath generation out of if() |
Date: |
Thu, 20 Apr 2017 17:41:06 +0100 |
Move the code to generate the "condition failed" instruction
codepath out of the if (singlestepping) {} else {}. This
will allow adding support for handling a new is_jmp type
which can't be neatly split into "singlestepping case"
versus "not singlestepping case".
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
target/arm/translate.c | 24 +++++++++++-------------
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index a1a0e73..87fd702 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -11988,9 +11988,9 @@ void gen_intermediate_code(CPUARMState *env,
TranslationBlock *tb)
/* At this stage dc->condjmp will only be set when the skipped
instruction was a conditional branch or trap, and the PC has
already been written. */
+ gen_set_condexec(dc);
if (unlikely(cs->singlestep_enabled || dc->ss_active)) {
/* Unconditional and "condition passed" instruction codepath. */
- gen_set_condexec(dc);
switch (dc->is_jmp) {
case DISAS_SWI:
gen_ss_advance(dc);
@@ -12013,13 +12013,6 @@ void gen_intermediate_code(CPUARMState *env,
TranslationBlock *tb)
/* FIXME: Single stepping a WFI insn will not halt the CPU. */
gen_singlestep_exception(dc);
}
- if (dc->condjmp) {
- /* "Condition failed" instruction codepath. */
- gen_set_label(dc->condlabel);
- gen_set_condexec(dc);
- gen_set_pc_im(dc, dc->pc);
- gen_singlestep_exception(dc);
- }
} else {
/* While branches must always occur at the end of an IT block,
there are a few other things that can cause us to terminate
@@ -12029,7 +12022,6 @@ void gen_intermediate_code(CPUARMState *env,
TranslationBlock *tb)
- Hardware watchpoints.
Hardware breakpoints have already been handled and skip this code.
*/
- gen_set_condexec(dc);
switch(dc->is_jmp) {
case DISAS_NEXT:
gen_goto_tb(dc, 1, dc->pc);
@@ -12069,11 +12061,17 @@ void gen_intermediate_code(CPUARMState *env,
TranslationBlock *tb)
gen_exception(EXCP_SMC, syn_aa32_smc(), 3);
break;
}
- if (dc->condjmp) {
- gen_set_label(dc->condlabel);
- gen_set_condexec(dc);
+ }
+
+ if (dc->condjmp) {
+ /* "Condition failed" instruction codepath for the branch/trap insn */
+ gen_set_label(dc->condlabel);
+ gen_set_condexec(dc);
+ if (unlikely(cs->singlestep_enabled || dc->ss_active)) {
+ gen_set_pc_im(dc, dc->pc);
+ gen_singlestep_exception(dc);
+ } else {
gen_goto_tb(dc, 1, dc->pc);
- dc->condjmp = 0;
}
}
--
2.7.4
- [Qemu-devel] [PULL 00/24] target-arm queue, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 16/24] arm: Don't implement BXJ on M-profile CPUs, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 17/24] arm: Thumb shift operations should not permit interworking branches, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 18/24] arm: Factor out "generate right kind of step exception", Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 15/24] xlnx-zynqmp: Set the Cadence GEM revision, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 12/24] cadence_gem: Correct the multi-queue can rx logic, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 19/24] arm: Move gen_set_condexec() and gen_set_pc_im() up in the file, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 14/24] cadence_gem: Make the revision a property, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 20/24] arm: Move condition-failed codepath generation out of if(),
Peter Maydell <=
- [Qemu-devel] [PULL 11/24] cadence_gem: Read the correct queue descriptor, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 09/24] arm/kvm: Remove trailing newlines from error_report(), Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 03/24] hw/char/exynos4210_uart: Constify static array and few arguments, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 08/24] stellaris: Don't hw_error() on bad register accesses, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 05/24] target/arm: Add missing entries to excnames[] for log strings, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 02/24] hw/arm/exynos: Convert fprintf to qemu_log_mask/error_report, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 01/24] hw/arm/boot: take Linux/arm64 TEXT_OFFSET header field into account, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 13/24] cadence_gem: Correct the interupt logic, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 21/24] arm: Abstract out "are we singlestepping" test to utility function, Peter Maydell, 2017/04/20
- [Qemu-devel] [PULL 22/24] arm: Track M profile handler mode state in TB flags, Peter Maydell, 2017/04/20