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[Qemu-devel] [PATCH] target-s390x: Mask the SIGP order_code to 8bit.
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH] target-s390x: Mask the SIGP order_code to 8bit. |
Date: |
Mon, 24 Apr 2017 00:32:16 +0200 |
From: Philipp Kern <address@hidden>
According to "CPU Signaling and Response", "Signal-Processor Orders",
the order field is bit position 56-63. Without this, the Linux
guest kernel is sometimes unable to stop emulation and enters
an infinite loop of "XXX unknown sigp: 0xffffffff00000005".
Signed-off-by: Philipp Kern <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
target/s390x/misc_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
This patch has been sent by Philipp Kern a lot of time ago, and it seems
has been lost. I am resending it, as it is still useful.
diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c
index 3bf09ea222..4946b56ab3 100644
--- a/target/s390x/misc_helper.c
+++ b/target/s390x/misc_helper.c
@@ -534,7 +534,7 @@ uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t
order_code, uint32_t r1,
/* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
as parameter (input). Status (output) is always R1. */
- switch (order_code) {
+ switch (order_code & 0xff) {
case SIGP_SET_ARCH:
/* switch arch */
break;
--
2.11.0
- [Qemu-devel] [PATCH] target-s390x: Mask the SIGP order_code to 8bit.,
Aurelien Jarno <=