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[Qemu-devel] [PATCH v2 13/14] target/sh4: movua.l is an SH4-A only instr
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH v2 13/14] target/sh4: movua.l is an SH4-A only instruction |
Date: |
Sat, 6 May 2017 13:14:30 +0200 |
At the same time change the comment describing the instruction the same
way than other instruction, so that the code is easier to read and search.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
target/sh4/translate.c | 26 +++++++++++++++-----------
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index d86fd29264..29ea506c1d 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -1502,17 +1502,21 @@ static void _decode_opc(DisasContext * ctx)
}
ctx->has_movcal = 1;
return;
- case 0x40a9:
- /* MOVUA.L @Rm,R0 (Rm) -> R0
- Load non-boundary-aligned data */
- tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, MO_TEUL);
- return;
- case 0x40e9:
- /* MOVUA.L @Rm+,R0 (Rm) -> R0, Rm + 4 -> Rm
- Load non-boundary-aligned data */
- tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, MO_TEUL);
- tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4);
- return;
+ case 0x40a9: /* movua.l @Rm,R0 */
+ /* Load non-boundary-aligned data */
+ if (ctx->features & SH_FEATURE_SH4A) {
+ tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, MO_TEUL);
+ return;
+ }
+ break;
+ case 0x40e9: /* movua.l @Rm+,R0 */
+ /* Load non-boundary-aligned data */
+ if (ctx->features & SH_FEATURE_SH4A) {
+ tcg_gen_qemu_ld_i32(REG(0), REG(B11_8), ctx->memidx, MO_TEUL);
+ tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 4);
+ return;
+ }
+ break;
case 0x0029: /* movt Rn */
tcg_gen_mov_i32(REG(B11_8), cpu_sr_t);
return;
--
2.11.0
- Re: [Qemu-devel] [PATCH v2 09/14] target/sh4: optimize gen_store_fpr64, (continued)
- [Qemu-devel] [PATCH v2 02/14] target/sh4: get rid of DELAY_SLOT_CLEARME, Aurelien Jarno, 2017/05/06
- [Qemu-devel] [PATCH v2 08/14] target/sh4: fold ctx->bstate = BS_BRANCH into gen_conditional_jump, Aurelien Jarno, 2017/05/06
- [Qemu-devel] [PATCH v2 10/14] target/sh4: optimize gen_write_sr using extract op, Aurelien Jarno, 2017/05/06
- [Qemu-devel] [PATCH v2 12/14] target/sh4: implement tas.b using atomic helper, Aurelien Jarno, 2017/05/06
- [Qemu-devel] [PATCH v2 13/14] target/sh4: movua.l is an SH4-A only instruction,
Aurelien Jarno <=
- [Qemu-devel] [PATCH v2 07/14] target/sh4: only save flags state at the end of the TB, Aurelien Jarno, 2017/05/06
- [Qemu-devel] [PATCH v2 04/14] target/sh4: move DELAY_SLOT_TRUE flag into a separate global, Aurelien Jarno, 2017/05/06
- [Qemu-devel] [PATCH v2 14/14] target/sh4: trap unaligned accesses, Aurelien Jarno, 2017/05/06
- [Qemu-devel] [PATCH v2 01/14] target/sh4: split ctx->flags into ctx->tbflags and ctx->envflags, Aurelien Jarno, 2017/05/06