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Re: [Qemu-devel] [PATCH RFC v19 01/13] target-avr: AVR cores support is
From: |
Michael Rolnik |
Subject: |
Re: [Qemu-devel] [PATCH RFC v19 01/13] target-avr: AVR cores support is added. |
Date: |
Tue, 13 Jun 2017 23:32:05 +0300 |
the last version of my patches were done by Richard. Now I just reapplied
them to the master.
Should I have to remove "signed-off-by Richard" ?
On Tue, Jun 13, 2017 at 11:09 PM, Thomas Huth <address@hidden> wrote:
> On 08.06.2017 20:49, Michael Rolnik wrote:
> > 1. basic CPU structure
> > 2. registers
> > 3. no instructions
> > 4. saving sreg, rampD, rampX, rampY, rampD, eind in HW representation
> >
> > Signed-off-by: Michael Rolnik <address@hidden>
> > Message-Id: <address@hidden>
> > Signed-off-by: Richard Henderson <address@hidden>
>
> Why is the final "Signed-off-by" by Richard, if the patch has apparently
> been sent by you, Michael? Something is wrong here with the order...
>
> Thomas
>
--
Best Regards,
Michael Rolnik
- [Qemu-devel] [PATCH RFC v19 00/13] QEMU AVR 8 bit cores, Michael Rolnik, 2017/06/08
- [Qemu-devel] [PATCH RFC v19 02/13] target-avr: adding AVR CPU features/flavors, Michael Rolnik, 2017/06/08
- [Qemu-devel] [PATCH RFC v19 03/13] target-avr: adding a sample AVR board, Michael Rolnik, 2017/06/08
- [Qemu-devel] [PATCH RFC v19 04/13] target-avr: adding instructions encodings, Michael Rolnik, 2017/06/08
- [Qemu-devel] [PATCH RFC v19 05/13] target-avr: adding AVR interrupt handling, Michael Rolnik, 2017/06/08
- [Qemu-devel] [PATCH RFC v19 06/13] target-avr: adding helpers for IN, OUT, SLEEP, WBR & unsupported instructions, Michael Rolnik, 2017/06/08
- [Qemu-devel] [PATCH RFC v19 09/13] target-avr: adding instruction decoder, Michael Rolnik, 2017/06/08