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[Qemu-devel] [PATCH v2 3/5] target/mips: Exit after enabling interrupts


From: Richard Henderson
Subject: [Qemu-devel] [PATCH v2 3/5] target/mips: Exit after enabling interrupts
Date: Wed, 14 Jun 2017 12:48:19 -0700

From: Paolo Bonzini <address@hidden>

Exit to cpu loop so we reevaluate cpu_mips_hw_interrupts.

Cc: Aurelien Jarno <address@hidden>
Cc: Yongbok Kim <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
 target/mips/translate.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 559f8fe..891f14b 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -13403,9 +13403,11 @@ static void gen_pool32axf (CPUMIPSState *env, 
DisasContext *ctx, int rt, int rs)
                 save_cpu_state(ctx, 1);
                 gen_helper_ei(t0, cpu_env);
                 gen_store_gpr(t0, rs);
-                /* Stop translation as we may have switched the execution mode 
*/
-                ctx->bstate = BS_STOP;
                 tcg_temp_free(t0);
+                /* BS_STOP isn't good enough here;
+                   reevaluate cpu_mips_hw_interrupts_enabled.  */
+                gen_save_pc(ctx->pc + 4);
+                ctx->bstate = BS_EXCP;
             }
             break;
         default:
-- 
2.9.4




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