Re: [Qemu-devel] [PATCH 1/7] target/m68k: add fscc.

[Richard Henderson]

On 06/25/2017 12:21 PM, Laurent Vivier wrote:
> +    c->g1 = 0;
> +    c->v2 = tcg_const_i32(0);
> +    c->g2 = 1;
> +    /* TODO: Raise BSUN exception.  */
>       fpsr = tcg_temp_new();
>       gen_load_fcr(s, fpsr, M68K_FPSR);
> -    l1 = gen_new_label();
> -    /* TODO: Raise BSUN exception.  */
> -    /* Jump to l1 if condition is true.  */
> -    switch (insn & 0x3f)  {
> +    switch (cond) {
>       case 0:  /* False */
>       case 16: /* Signaling False */
> +        c->v1 = c->v2;
> +        c->tcond = TCG_COND_NEVER;
>           break;
>       case 1:  /* EQual Z */
>       case 17: /* Signaling EQual Z */
> -        tmp = tcg_temp_new();
> -        tcg_gen_andi_i32(tmp, fpsr, FPSR_CC_Z);
> -        tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, l1);
> +        c->v1 = tcg_temp_new();
> +        c->g1 = 1;

g[12] means "global", i.e. don't free the temp in free_cond.
Which is not true of any of the temps that you allocate here.


r~