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Re: [Qemu-devel] [PATCH v1] s390x/cpumodel: allow to enable "idtes" feat


From: David Hildenbrand
Subject: Re: [Qemu-devel] [PATCH v1] s390x/cpumodel: allow to enable "idtes" feature for TCG
Date: Wed, 28 Jun 2017 19:02:58 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.1.0

On 28.06.2017 16:21, Thomas Huth wrote:
> On 27.06.2017 18:10, David Hildenbrand wrote:
>> STFL bit 4 and 5 are just indications to the guest, which TLB entries an
>> IDTE call will clear. These are performance indicators for the guest.
>>
>> STFL bit 4:
>>     INVALIDATE DAT TABLE ENTRY (IDTE) performs
>>     the invalidation-and-clearing operation by
>>     selectively clearing TLB segment-table entries
>>     when a segment-table entry or entries are
>>     invalidated. IDTE also performs the clearing-by-
>>     ASCE operation. Unless bit 4 is one, IDTE simply
>>     purges all TLBs. Bit 3 is one if bit 4 is one.
>>
>> We can simply set STFL bit 4 ("idtes") and still purge the complete TLB.
>> Purging more than advertised is never bad. E.g. Linux doesn't even care
>> about this bit. We can optimized this later.
> 
> Not sure, but why do we need this bit in add_qemu_cpu_model_features()
> if Linux does not care about it? We will get it automatically once we
> support the z9 in TCG...

The idea is to use this as a list we support in addition to the z900
features. This is later helpful when actually switching to a new model
(z9 might still take some time). Nobody has to do go over all features
again and see if they are implemented.

The commit subject also contains a description then why we can simply
enable it.

> 
>  Thomas
> 


-- 

Thanks,

David



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