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[Qemu-devel] [PULL 4/5] util/cacheinfo: Fix warning generated by clang
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 4/5] util/cacheinfo: Fix warning generated by clang |
Date: |
Sun, 9 Jul 2017 21:35:00 -1000 |
From: Pranith Kumar <address@hidden>
Clang generates the following warning on aarch64 host:
CC util/cacheinfo.o
/home/pranith/qemu/util/cacheinfo.c:121:48: warning: value size does not match
register size specified by the constraint and modifier [-Wasm-operand-widths]
asm volatile("mrs\t%0, ctr_el0" : "=r"(ctr));
^
/home/pranith/qemu/util/cacheinfo.c:121:28: note: use constraint modifier "w"
asm volatile("mrs\t%0, ctr_el0" : "=r"(ctr));
^~
%w0
Constraint modifier 'w' is not (yet?) accepted by gcc. Fix this by increasing
the ctr size.
Tested-by: Emilio G. Cota <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
Signed-off-by: Pranith Kumar <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
util/cacheinfo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/util/cacheinfo.c b/util/cacheinfo.c
index f987522..6253049 100644
--- a/util/cacheinfo.c
+++ b/util/cacheinfo.c
@@ -112,7 +112,7 @@ static void sys_cache_info(int *isize, int *dsize)
static void arch_cache_info(int *isize, int *dsize)
{
if (*isize == 0 || *dsize == 0) {
- unsigned ctr;
+ unsigned long ctr;
/* The real cache geometry is in CCSIDR_EL1/CLIDR_EL1/CSSELR_EL1,
but (at least under Linux) these are marked protected by the
--
2.9.4
- [Qemu-devel] [PULL 0/5] Queued tcg patches, Richard Henderson, 2017/07/10
- [Qemu-devel] [PULL 2/5] tcg/aarch64: Use ADRP+ADD to compute target address, Richard Henderson, 2017/07/10
- [Qemu-devel] [PULL 4/5] util/cacheinfo: Fix warning generated by clang,
Richard Henderson <=
- [Qemu-devel] [PULL 5/5] tcg/mips: Bugfix for crash when running program with qemu-i386., Richard Henderson, 2017/07/10
- [Qemu-devel] [PULL 1/5] tcg/aarch64: Introduce and use long branch to register, Richard Henderson, 2017/07/10
- [Qemu-devel] [PULL 3/5] tcg/aarch64: Enable indirect jump path using LDR (literal), Richard Henderson, 2017/07/10
- Re: [Qemu-devel] [PULL 0/5] Queued tcg patches, Peter Maydell, 2017/07/10