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[Qemu-devel] [PATCH 4/8] apb: fix up PCI bus nomenclature
From: |
Mark Cave-Ayland |
Subject: |
[Qemu-devel] [PATCH 4/8] apb: fix up PCI bus nomenclature |
Date: |
Tue, 11 Jul 2017 22:53:23 +0100 |
Rather than referring to the PCI busses as bus2 and bus3, refer to them as
busA and busB as per the documentation. Also replace the long bus names with
the shorter pciA and pciB aliases (to make it easier to attach additional
devices to either from the command line).
Signed-off-by: Mark Cave-Ayland <address@hidden>
---
hw/pci-host/apb.c | 12 +++++-------
hw/sparc64/sun4u.c | 8 ++++----
2 files changed, 9 insertions(+), 11 deletions(-)
diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
index 326f5ef..622c341 100644
--- a/hw/pci-host/apb.c
+++ b/hw/pci-host/apb.c
@@ -656,7 +656,7 @@ static void apb_pci_bridge_realize(PCIDevice *dev, Error
**errp)
PCIBus *pci_apb_init(hwaddr special_base,
hwaddr mem_base,
- qemu_irq *ivec_irqs, PCIBus **bus2, PCIBus **bus3,
+ qemu_irq *ivec_irqs, PCIBus **busA, PCIBus **busB,
qemu_irq **pbm_irqs)
{
DeviceState *dev;
@@ -706,18 +706,16 @@ PCIBus *pci_apb_init(hwaddr special_base,
pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 0), true,
"pbm-bridge");
br = PCI_BRIDGE(pci_dev);
- pci_bridge_map_irq(br, "Advanced PCI Bus secondary bridge 1",
- pci_apb_map_irq);
+ pci_bridge_map_irq(br, "pciB", pci_apb_map_irq);
qdev_init_nofail(&pci_dev->qdev);
- *bus2 = pci_bridge_get_sec_bus(br);
+ *busB = pci_bridge_get_sec_bus(br);
pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 1), true,
"pbm-bridge");
br = PCI_BRIDGE(pci_dev);
- pci_bridge_map_irq(br, "Advanced PCI Bus secondary bridge 2",
- pci_apb_map_irq);
+ pci_bridge_map_irq(br, "pciA", pci_apb_map_irq);
qdev_init_nofail(&pci_dev->qdev);
- *bus3 = pci_bridge_get_sec_bus(br);
+ *busA = pci_bridge_get_sec_bus(br);
return phb->bus;
}
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 4f96d97..5ddd30f 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -426,7 +426,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
Nvram *nvram;
unsigned int i;
uint64_t initrd_addr, initrd_size, kernel_addr, kernel_size, kernel_entry;
- PCIBus *pci_bus, *pci_bus2, *pci_bus3;
+ PCIBus *pci_bus, *pci_busA, *pci_busB;
PCIDevice *ebus;
ISABus *isa_bus;
SysBusDevice *s;
@@ -446,11 +446,11 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
prom_init(hwdef->prom_addr, bios_name);
ivec_irqs = qemu_allocate_irqs(sparc64_cpu_set_ivec_irq, cpu, IVEC_MAX);
- pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, ivec_irqs,
&pci_bus2,
- &pci_bus3, &pbm_irqs);
+ pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, ivec_irqs,
&pci_busA,
+ &pci_busB, &pbm_irqs);
pci_vga_init(pci_bus);
- /* XXX Should be pci_bus3 */
+ /* XXX Should be pci_busA */
ebus = pci_create_simple(pci_bus, -1, "ebus");
isa_bus = pci_ebus_init(ebus, pbm_irqs);
--
1.7.10.4
- [Qemu-devel] [PATCH 0/8] sun4u: change PCI topology to better match a real Ultra 5, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 2/8] sun4u: switch to using qdev to instantiate fw_cfg interface, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 4/8] apb: fix up PCI bus nomenclature,
Mark Cave-Ayland <=
- [Qemu-devel] [PATCH 3/8] sun4u: expose fw_cfg and NVRAM on ebus PCI IO address space, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 7/8] sun4u: create single default onboard ne2k_pci NIC for machine, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 6/8] apb: add busA qdev property to PBM PCI bridge, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 8/8] sun4u: move in-built devices behind PCI bridge A, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 1/8] sun4u: pass PCIDevice into pci_ebus_init() instead of PCIBus, Mark Cave-Ayland, 2017/07/11
- [Qemu-devel] [PATCH 5/8] apb: fix endianness for APB and PCI config accesses, Mark Cave-Ayland, 2017/07/11