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Re: [Qemu-devel] [PULL 23/41] mttcg/i386: Patch instruction using async_
From: |
Alex Bennée |
Subject: |
Re: [Qemu-devel] [PULL 23/41] mttcg/i386: Patch instruction using async_safe_* framework |
Date: |
Thu, 13 Jul 2017 16:16:12 +0100 |
User-agent: |
mu4e 0.9.19; emacs 25.2.50.3 |
Paolo Bonzini <address@hidden> writes:
> From: Pranith Kumar <address@hidden>
>
> In mttcg, calling pause_all_vcpus() during execution from the
> generated TBs causes a deadlock if some vCPU is waiting for exclusive
> execution in start_exclusive(). Fix this by using the aync_safe_*
> framework instead of pausing vcpus for patching instructions.
>
> CC: Paolo Bonzini <address@hidden>
> CC: Peter Maydell <address@hidden>
> Reviewed-by: Richard Henderson <address@hidden>
> Reviewed-by: Alex Bennée <address@hidden>
Looks like some UTF-8 mangling has occurred somewhere here.
> Signed-off-by: Pranith Kumar <address@hidden>
> Message-Id: <address@hidden>
> [Get rid completely of the TCG-specific code. - Paolo]
> Signed-off-by: Paolo Bonzini <address@hidden>
> ---
> hw/i386/kvmvapic.c | 85
> +++++++++++++++++++++++++-----------------------------
> 1 file changed, 39 insertions(+), 46 deletions(-)
>
> diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c
> index 0d9ef77..fc962c5 100644
> --- a/hw/i386/kvmvapic.c
> +++ b/hw/i386/kvmvapic.c
> @@ -383,8 +383,7 @@ static void patch_byte(X86CPU *cpu, target_ulong addr,
> uint8_t byte)
> cpu_memory_rw_debug(CPU(cpu), addr, &byte, 1, 1);
> }
>
> -static void patch_call(VAPICROMState *s, X86CPU *cpu, target_ulong ip,
> - uint32_t target)
> +static void patch_call(X86CPU *cpu, target_ulong ip, uint32_t target)
> {
> uint32_t offset;
>
> @@ -393,77 +392,71 @@ static void patch_call(VAPICROMState *s, X86CPU *cpu,
> target_ulong ip,
> cpu_memory_rw_debug(CPU(cpu), ip + 1, (void *)&offset, sizeof(offset),
> 1);
> }
>
> -static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip)
> +typedef struct PatchInfo {
> + VAPICHandlers *handler;
> + target_ulong ip;
> +} PatchInfo;
> +
> +static void do_patch_instruction(CPUState *cs, run_on_cpu_data data)
> {
> - CPUState *cs = CPU(cpu);
> - CPUX86State *env = &cpu->env;
> - VAPICHandlers *handlers;
> + X86CPU *x86_cpu = X86_CPU(cs);
> + PatchInfo *info = (PatchInfo *) data.host_ptr;
> + VAPICHandlers *handlers = info->handler;
> + target_ulong ip = info->ip;
> uint8_t opcode[2];
> uint32_t imm32 = 0;
> - target_ulong current_pc = 0;
> - target_ulong current_cs_base = 0;
> - uint32_t current_flags = 0;
> -
> - if (smp_cpus == 1) {
> - handlers = &s->rom_state.up;
> - } else {
> - handlers = &s->rom_state.mp;
> - }
> -
> - if (tcg_enabled()) {
> - cpu_restore_state(cs, cs->mem_io_pc);
> - cpu_get_tb_cpu_state(env, ¤t_pc, ¤t_cs_base,
> - ¤t_flags);
> - /* Account this instruction, because we will exit the tb.
> - This is the first instruction in the block. Therefore
> - there is no need in restoring CPU state. */
> - if (use_icount) {
> - --cs->icount_decr.u16.low;
> - }
> - }
> -
> - pause_all_vcpus();
>
> cpu_memory_rw_debug(cs, ip, opcode, sizeof(opcode), 0);
>
> switch (opcode[0]) {
> case 0x89: /* mov r32 to r/m32 */
> - patch_byte(cpu, ip, 0x50 + modrm_reg(opcode[1])); /* push reg */
> - patch_call(s, cpu, ip + 1, handlers->set_tpr);
> + patch_byte(x86_cpu, ip, 0x50 + modrm_reg(opcode[1])); /* push reg */
> + patch_call(x86_cpu, ip + 1, handlers->set_tpr);
> break;
> case 0x8b: /* mov r/m32 to r32 */
> - patch_byte(cpu, ip, 0x90);
> - patch_call(s, cpu, ip + 1, handlers->get_tpr[modrm_reg(opcode[1])]);
> + patch_byte(x86_cpu, ip, 0x90);
> + patch_call(x86_cpu, ip + 1, handlers->get_tpr[modrm_reg(opcode[1])]);
> break;
> case 0xa1: /* mov abs to eax */
> - patch_call(s, cpu, ip, handlers->get_tpr[0]);
> + patch_call(x86_cpu, ip, handlers->get_tpr[0]);
> break;
> case 0xa3: /* mov eax to abs */
> - patch_call(s, cpu, ip, handlers->set_tpr_eax);
> + patch_call(x86_cpu, ip, handlers->set_tpr_eax);
> break;
> case 0xc7: /* mov imm32, r/m32 (c7/0) */
> - patch_byte(cpu, ip, 0x68); /* push imm32 */
> + patch_byte(x86_cpu, ip, 0x68); /* push imm32 */
> cpu_memory_rw_debug(cs, ip + 6, (void *)&imm32, sizeof(imm32), 0);
> cpu_memory_rw_debug(cs, ip + 1, (void *)&imm32, sizeof(imm32), 1);
> - patch_call(s, cpu, ip + 5, handlers->set_tpr);
> + patch_call(x86_cpu, ip + 5, handlers->set_tpr);
> break;
> case 0xff: /* push r/m32 */
> - patch_byte(cpu, ip, 0x50); /* push eax */
> - patch_call(s, cpu, ip + 1, handlers->get_tpr_stack);
> + patch_byte(x86_cpu, ip, 0x50); /* push eax */
> + patch_call(x86_cpu, ip + 1, handlers->get_tpr_stack);
> break;
> default:
> abort();
> }
>
> - resume_all_vcpus();
> + g_free(info);
> +}
> +
> +static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip)
> +{
> + CPUState *cs = CPU(cpu);
> + VAPICHandlers *handlers;
> + PatchInfo *info;
>
> - if (tcg_enabled()) {
> - /* Both tb_lock and iothread_mutex will be reset when
> - * longjmps back into the cpu_exec loop. */
> - tb_lock();
> - tb_gen_code(cs, current_pc, current_cs_base, current_flags, 1);
> - cpu_loop_exit_noexc(cs);
> + if (smp_cpus == 1) {
> + handlers = &s->rom_state.up;
> + } else {
> + handlers = &s->rom_state.mp;
> }
> +
> + info = g_new(PatchInfo, 1);
> + info->handler = handlers;
> + info->ip = ip;
> +
> + async_safe_run_on_cpu(cs, do_patch_instruction,
> RUN_ON_CPU_HOST_PTR(info));
> }
>
> void vapic_report_tpr_access(DeviceState *dev, CPUState *cs, target_ulong ip,
--
Alex Bennée
- [Qemu-devel] [PULL 10/41] char: chardevice hotswap, (continued)
- [Qemu-devel] [PULL 10/41] char: chardevice hotswap, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 13/41] test-char: destroy chardev-udp after test, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 12/41] char: avoid chardevice direct access, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 16/41] test-char: add hotswap test, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 14/41] test-char: split char_udp_test, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 17/41] hmp: add hmp analogue for qmp-chardev-change, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 15/41] test-char: split char_file_test, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 19/41] serial: move TIOCM update to a separate function, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 21/41] exec: use qemu_ram_ptr_length to access guest ram, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 23/41] mttcg/i386: Patch instruction using async_safe_* framework, Paolo Bonzini, 2017/07/13
- Re: [Qemu-devel] [PULL 23/41] mttcg/i386: Patch instruction using async_safe_* framework,
Alex Bennée <=
- [Qemu-devel] [PULL 27/41] gdbstub: don't fail on vCont; C04:0; c packets, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 25/41] gdbstub: rename cpu_index -> cpu_gdb_index, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 28/41] chardev: fix parallel device can't be reconnect, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 34/41] nbd: Simplify trace of client flags in negotiation, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 35/41] nbd: Refactor reply to NBD_OPT_EXPORT_NAME, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 36/41] nbd: Implement NBD_OPT_GO on server, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 41/41] translate-all: remove redundant !tcg_enabled check in dump_exec_info, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 09/41] char: add backend hotswap handler, Paolo Bonzini, 2017/07/13
- [Qemu-devel] [PULL 11/41] char: forbid direct chardevice access for hotswap devices, Paolo Bonzini, 2017/07/13