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[Qemu-devel] [PATCH v3 20/30] target/sh4: Unify code for CHECK_FPU_ENABL
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v3 20/30] target/sh4: Unify code for CHECK_FPU_ENABLED |
Date: |
Tue, 18 Jul 2017 10:02:45 -1000 |
We do not need to emit N copies of raising an exception.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Aurelien Jarno <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/sh4/translate.c | 24 ++++++++++++++----------
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index b40e52b..4c32248 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -379,16 +379,9 @@ static inline void gen_store_fpr64(DisasContext *ctx,
TCGv_i64 t, int reg)
goto do_illegal; \
}
-#define CHECK_FPU_ENABLED \
- if (ctx->tbflags & (1u << SR_FD)) { \
- gen_save_cpu_state(ctx, true); \
- if (ctx->envflags & DELAY_SLOT_MASK) { \
- gen_helper_raise_slot_fpu_disable(cpu_env); \
- } else { \
- gen_helper_raise_fpu_disable(cpu_env); \
- } \
- ctx->bstate = BS_EXCP; \
- return; \
+#define CHECK_FPU_ENABLED \
+ if (ctx->tbflags & (1u << SR_FD)) { \
+ goto do_fpu_disabled; \
}
static void _decode_opc(DisasContext * ctx)
@@ -1808,6 +1801,17 @@ static void _decode_opc(DisasContext * ctx)
gen_helper_raise_illegal_instruction(cpu_env);
}
ctx->bstate = BS_EXCP;
+ return;
+
+ do_fpu_disabled:
+ gen_save_cpu_state(ctx, true);
+ if (ctx->envflags & DELAY_SLOT_MASK) {
+ gen_helper_raise_slot_fpu_disable(cpu_env);
+ } else {
+ gen_helper_raise_fpu_disable(cpu_env);
+ }
+ ctx->bstate = BS_EXCP;
+ return;
}
static void decode_opc(DisasContext * ctx)
--
2.9.4
- [Qemu-devel] [PATCH v3 09/30] linux-user/sh4: Clean env->flags on signal boundaries, (continued)
- [Qemu-devel] [PATCH v3 09/30] linux-user/sh4: Clean env->flags on signal boundaries, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 10/30] target/sh4: Hoist register bank selection, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 12/30] target/sh4: Pass DisasContext to fpr64 routines, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 11/30] target/sh4: Unify cpu_fregs into FREG, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 14/30] target/sh4: Eliminate unused XREG macro, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 16/30] target/sh4: Load/store Dr as 64-bit quantities, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 17/30] target/sh4: Simplify 64-bit fp reg-reg move, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 18/30] target/sh4: Unify code for CHECK_NOT_DELAY_SLOT, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 15/30] target/sh4: Merge DREG into fpr64 routines, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 19/30] target/sh4: Unify code for CHECK_PRIVILEGED, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 20/30] target/sh4: Unify code for CHECK_FPU_ENABLED,
Richard Henderson <=
- [Qemu-devel] [PATCH v3 21/30] target/sh4: Tidy misc illegal insn checks, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 22/30] target/sh4: Introduce CHECK_FPSCR_PR_*, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 24/30] target/sh4: Implement fpchg, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 23/30] target/sh4: Introduce CHECK_SH4A, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 25/30] target/sh4: Add missing FPSCR.PR == 0 checks, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 26/30] target/sh4: Implement fsrra, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 27/30] target/sh4: Use tcg_gen_lookup_and_goto_ptr, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 28/30] tcg: Fix off-by-one in assert in page_set_flags, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 30/30] linux-user/sh4: Reduce TARGET_VIRT_ADDR_SPACE_BITS to 31, Richard Henderson, 2017/07/18
- [Qemu-devel] [PATCH v3 29/30] linux-user: Tidy and enforce reserved_va initialization, Richard Henderson, 2017/07/18