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Re: [Qemu-devel] [PATCH] pci: honor PCI_COMMAND_MEMORY


From: Michael S. Tsirkin
Subject: Re: [Qemu-devel] [PATCH] pci: honor PCI_COMMAND_MEMORY
Date: Wed, 19 Jul 2017 00:34:44 +0300

On Tue, Jul 18, 2017 at 10:23:06AM +0300, Dmitry Fleytman wrote:
> On 17 Jul 2017, at 19:59 PM, Michael S. Tsirkin <address@hidden> wrote:
> 
> 
>     On Mon, Jul 17, 2017 at 03:48:03PM +0300, Dmitry Fleytman wrote:
> 
>         Am I understand correctly that there are no special cases for
>         IDE controllers, i.e. bus master bit must be set by SW same
>         way as for other PCI devices?
> 
> 
>     Bus mastering is typically enabled by the driver.
>     E.g. under linux:
> 
>     static int virtio_pci_restore(struct device *dev)
>     {
>            struct pci_dev *pci_dev = to_pci_dev(dev);
>            struct virtio_pci_device *vp_dev = pci_get_drvdata(pci_dev);
>            int ret;
> 
>            ret = pci_enable_device(pci_dev);
>            if (ret)
>                    return ret;
> 
>            pci_set_master(pci_dev);
>            return virtio_device_restore(&vp_dev->vdev);
>     }
> 
> 
>     As an exception, in case of BIOS booting using device ROM, it is set by
>     the ROM. E.g. src/hw/virtio-pci.c:
> 
>        vp_reset(vp);
>        pci_enable_busmaster(pci);
>        vp_set_status(vp, VIRTIO_CONFIG_S_ACKNOWLEDGE |
>                      VIRTIO_CONFIG_S_DRIVER );
> 
> 
> 
> Thanks, Michael.
> 
> After some more investigations, there are additional interesting details.
> 
> First of all, resume from hibernation succeeds without USB host controller
> (-usbtablet).
> 
> I did tracing of PCI configuration space writes and here is what I see:

All I can say is uhci confuses windows somehow.
Try another type of controller?


>     --
>     MST
> 
> 



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