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[Qemu-devel] [PULL 04/31] target/sh4: do not use a helper to implement f
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PULL 04/31] target/sh4: do not use a helper to implement fneg |
Date: |
Tue, 18 Jul 2017 23:50:23 +0200 |
There is no need to use a helper to flip one bit, just use a TCG xor
instruction instead.
Message-Id: <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
---
target/sh4/helper.h | 1 -
target/sh4/op_helper.c | 5 -----
target/sh4/translate.c | 5 ++---
3 files changed, 2 insertions(+), 9 deletions(-)
diff --git a/target/sh4/helper.h b/target/sh4/helper.h
index f715224822..d2398922dd 100644
--- a/target/sh4/helper.h
+++ b/target/sh4/helper.h
@@ -32,7 +32,6 @@ DEF_HELPER_FLAGS_2(float_DT, TCG_CALL_NO_WG, f64, env, i32)
DEF_HELPER_FLAGS_4(fmac_FT, TCG_CALL_NO_WG, f32, env, f32, f32, f32)
DEF_HELPER_FLAGS_3(fmul_FT, TCG_CALL_NO_WG, f32, env, f32, f32)
DEF_HELPER_FLAGS_3(fmul_DT, TCG_CALL_NO_WG, f64, env, f64, f64)
-DEF_HELPER_FLAGS_1(fneg_T, TCG_CALL_NO_RWG_SE, f32, f32)
DEF_HELPER_FLAGS_3(fsub_FT, TCG_CALL_NO_WG, f32, env, f32, f32)
DEF_HELPER_FLAGS_3(fsub_DT, TCG_CALL_NO_WG, f64, env, f64, f64)
DEF_HELPER_FLAGS_2(fsqrt_FT, TCG_CALL_NO_WG, f32, env, f32)
diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c
index f2e39c5ca6..64206cf803 100644
--- a/target/sh4/op_helper.c
+++ b/target/sh4/op_helper.c
@@ -384,11 +384,6 @@ float64 helper_fmul_DT(CPUSH4State *env, float64 t0,
float64 t1)
return t0;
}
-float32 helper_fneg_T(float32 t0)
-{
- return float32_chs(t0);
-}
-
float32 helper_fsqrt_FT(CPUSH4State *env, float32 t0)
{
set_float_exception_flags(0, &env->fp_status);
diff --git a/target/sh4/translate.c b/target/sh4/translate.c
index bff212a78e..9360522a98 100644
--- a/target/sh4/translate.c
+++ b/target/sh4/translate.c
@@ -1691,9 +1691,8 @@ static void _decode_opc(DisasContext * ctx)
return;
case 0xf04d: /* fneg FRn/DRn - FPSCR: Nothing */
CHECK_FPU_ENABLED
- {
- gen_helper_fneg_T(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B11_8)]);
- }
+ tcg_gen_xori_i32(cpu_fregs[FREG(B11_8)], cpu_fregs[FREG(B11_8)],
+ 0x80000000);
return;
case 0xf05d: /* fabs FRn/DRn - FPCSR: Nothing */
CHECK_FPU_ENABLED
--
2.11.0
- [Qemu-devel] [PULL 13/31] linux-user/sh4: Clean env->flags on signal boundaries, (continued)
- [Qemu-devel] [PULL 13/31] linux-user/sh4: Clean env->flags on signal boundaries, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 30/31] target/sh4: Implement fsrra, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 17/31] target/sh4: Hoist fp register bank selection, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 25/31] target/sh4: Tidy misc illegal insn checks, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 05/31] target/sh4: return result of fcmp using TCG, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 31/31] target/sh4: Use tcg_gen_lookup_and_goto_ptr, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 29/31] target/sh4: Add missing FPSCR.PR == 0 checks, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 20/31] target/sh4: Load/store Dr as 64-bit quantities, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 10/31] target/sh4: Handle user-space atomics, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 28/31] target/sh4: Implement fpchg, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 04/31] target/sh4: do not use a helper to implement fneg,
Aurelien Jarno <=
- [Qemu-devel] [PULL 22/31] target/sh4: Unify code for CHECK_NOT_DELAY_SLOT, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 03/31] target/sh4: fix FPSCR cause vs flag inversion, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 27/31] target/sh4: Introduce CHECK_SH4A, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 11/31] target/sh4: Recognize common gUSA sequences, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 08/31] target/sh4: Keep env->flags clean, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 23/31] target/sh4: Unify code for CHECK_PRIVILEGED, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 12/31] linux-user/sh4: Notice gUSA regions during signal delivery, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 16/31] target/sh4: Pass DisasContext to fpr64 routines, Aurelien Jarno, 2017/07/18
- [Qemu-devel] [PULL 15/31] target/sh4: Unify cpu_fregs into FREG, Aurelien Jarno, 2017/07/18
- Re: [Qemu-devel] [PULL 00/31] target/sh4 queue, no-reply, 2017/07/18