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[Qemu-devel] [PATCH v15 19/32] target/arm: [tcg] Port to insn_start
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v15 19/32] target/arm: [tcg] Port to insn_start |
Date: |
Mon, 24 Jul 2017 13:27:15 -0700 |
From: Lluís Vilanova <address@hidden>
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Alex Benneé <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 5acdeabebb..c7010fffa5 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -11906,6 +11906,16 @@ static void arm_tr_tb_start(DisasContextBase *dcbase,
CPUState *cpu)
}
}
+static void arm_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
+{
+ DisasContext *dc = container_of(dcbase, DisasContext, base);
+
+ dc->insn_start_idx = tcg_op_buf_count();
+ tcg_gen_insn_start(dc->pc,
+ (dc->condexec_cond << 4) | (dc->condexec_mask >> 1),
+ 0);
+}
+
/* generate intermediate code for basic block 'tb'. */
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
{
@@ -11949,10 +11959,7 @@ void gen_intermediate_code(CPUState *cs,
TranslationBlock *tb)
do {
dc->base.num_insns++;
- dc->insn_start_idx = tcg_op_buf_count();
- tcg_gen_insn_start(dc->pc,
- (dc->condexec_cond << 4) | (dc->condexec_mask >> 1),
- 0);
+ arm_tr_insn_start(&dc->base, cs);
if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) {
CPUBreakpoint *bp;
--
2.13.3
- [Qemu-devel] [PATCH v15 11/32] target/i386: [tcg] Port to translate_insn, (continued)
- [Qemu-devel] [PATCH v15 11/32] target/i386: [tcg] Port to translate_insn, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 07/32] target/i386: [tcg] Port to DisasContextBase, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 10/32] target/i386: [tcg] Port to breakpoint_check, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 13/32] target/i386: [tcg] Port to disas_log, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 12/32] target/i386: [tcg] Port to tb_stop, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 14/32] target/i386: [tcg] Port to generic translation framework, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 16/32] target/arm: [tcg] Port to init_disas_context, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 17/32] target/arm: [tcg, a64] Port to init_disas_context, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 18/32] target/arm: [tcg] Port to tb_start, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 15/32] target/arm: [tcg] Port to DisasContextBase, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 19/32] target/arm: [tcg] Port to insn_start,
Richard Henderson <=
- [Qemu-devel] [PATCH v15 20/32] target/arm: [tcg, a64] Port to insn_start, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 21/32] target/arm: [tcg, a64] Port to breakpoint_check, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 22/32] target/arm: [tcg] Port to translate_insn, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 23/32] target/arm: [tcg, a64] Port to translate_insn, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 24/32] target/arm: [tcg] Port to tb_stop, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 25/32] target/arm: [tcg, a64] Port to tb_stop, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 27/32] target/arm: [tcg, a64] Port to disas_log, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 26/32] target/arm: [tcg] Port to disas_log, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 30/32] target/arm: Move ss check to init_disas_context, Richard Henderson, 2017/07/24
- [Qemu-devel] [PATCH v15 28/32] target/arm: [tcg] Port to generic translation framework, Richard Henderson, 2017/07/24