Re: [Qemu-devel] [RFC v2 PATCH] tcg/softmmu: Increase size of TLB caches

[Richard Henderson]

On 08/24/2017 08:58 AM, Pranith Kumar wrote:
> | TLB bits\vTLB entires |             8 |            16  |            32 |
> |                     8 | 952.94(+0.0%) | 929.99(+2.4%)  | 919.02(+3.6%) |
> |                    10 | 898.92(+5.6%) | 886.13(+7.0%)  | 887.03(+6.9%) |
> |                    12 | 878.56(+7.8%) | 873.53(+8.3%)* | 875.34(+8.1%) |

Thanks for collecting this.


> @@ -89,7 +89,7 @@ typedef uint64_t target_ulong;
>   * of tlb_table inside env (which is non-trivial but not huge).
>   */
>  #define CPU_TLB_BITS                                             \
> -    MIN(8,                                                       \
> +    MIN(CPU_TLB_BITS_MAX,                                        \
>          TCG_TARGET_TLB_DISPLACEMENT_BITS - CPU_TLB_ENTRY_BITS -  \
>          (NB_MMU_MODES <= 1 ? 0 :                                 \
>           NB_MMU_MODES <= 2 ? 1 :                                 \
> diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
> index 55a46ac825..f428e09c98 100644
> --- a/tcg/aarch64/tcg-target.h
> +++ b/tcg/aarch64/tcg-target.h
> @@ -15,6 +15,7 @@
>  
>  #define TCG_TARGET_INSN_UNIT_SIZE  4
>  #define TCG_TARGET_TLB_DISPLACEMENT_BITS 24
> +#define CPU_TLB_BITS_MAX 12

I'd rather the definition in tcg-target.h reflect the actual maximum and limit
that to what we want (12) within cpu-defs.h.  So, here maybe

#define TCG_TARGET_TLB_MAX_INDEX_BITS  32

etc.


r~