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Re: [Qemu-devel] [PATCH 18/20] target/arm: Make CFSR register banked for


From: Richard Henderson
Subject: Re: [Qemu-devel] [PATCH 18/20] target/arm: Make CFSR register banked for v8M
Date: Tue, 29 Aug 2017 09:12:39 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.2.1

On 08/22/2017 08:08 AM, Peter Maydell wrote:
> Make the CFSR register banked if v8M security extensions are enabled.
> 
> Not all the bits in this register are banked: the BFSR
> bits [15:8] are shared between S and NS, and we store them
> in the NS copy of the register.
> 
> Signed-off-by: Peter Maydell <address@hidden>
> ---
>  target/arm/cpu.h      |  7 ++++++-
>  hw/intc/armv7m_nvic.c | 15 +++++++++++++--
>  target/arm/helper.c   | 18 +++++++++---------
>  target/arm/machine.c  |  3 ++-
>  4 files changed, 30 insertions(+), 13 deletions(-)

Reviewed-by: Richard Henderson <address@hidden>


r~





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