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[Qemu-devel] [PULL 07/17] hw/pci: introduce bridge-only vendor-specific
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] [PULL 07/17] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware |
Date: |
Fri, 8 Sep 2017 17:19:13 +0300 |
From: Aleksandr Bezzubikov <address@hidden>
On PCI init PCI bridges may need some extra info about bus number,
IO, memory and prefetchable memory to reserve. QEMU can provide this
with a special vendor-specific PCI capability.
Signed-off-by: Aleksandr Bezzubikov <address@hidden>
Reviewed-by: Marcel Apfelbaum <address@hidden>
Tested-by: Marcel Apfelbaum <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
---
include/hw/pci/pci_bridge.h | 25 ++++++++++++++++++++++++
hw/pci/pci_bridge.c | 46 +++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 71 insertions(+)
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index ff7cbaa..1acadc2 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
@@ -67,4 +67,29 @@ void pci_bridge_map_irq(PCIBridge *br, const char* bus_name,
#define PCI_BRIDGE_CTL_DISCARD_STATUS 0x400 /* Discard timer status */
#define PCI_BRIDGE_CTL_DISCARD_SERR 0x800 /* Discard timer SERR# enable */
+typedef struct PCIBridgeQemuCap {
+ uint8_t id; /* Standard PCI capability header field */
+ uint8_t next; /* Standard PCI capability header field */
+ uint8_t len; /* Standard PCI vendor-specific capability header field */
+ uint8_t type; /* Red Hat vendor-specific capability type.
+ Types are defined with REDHAT_PCI_CAP_ prefix */
+
+ uint32_t bus_res; /* Minimum number of buses to reserve */
+ uint64_t io; /* IO space to reserve */
+ uint32_t mem; /* Non-prefetchable memory to reserve */
+ /* At most one of the following two fields may be set to a value
+ * different from -1 */
+ uint32_t mem_pref_32; /* Prefetchable memory to reserve (32-bit MMIO) */
+ uint64_t mem_pref_64; /* Prefetchable memory to reserve (64-bit MMIO) */
+} PCIBridgeQemuCap;
+
+#define REDHAT_PCI_CAP_RESOURCE_RESERVE 1
+
+int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
+ uint32_t bus_reserve, uint64_t io_reserve,
+ uint32_t mem_non_pref_reserve,
+ uint32_t mem_pref_32_reserve,
+ uint64_t mem_pref_64_reserve,
+ Error **errp);
+
#endif /* QEMU_PCI_BRIDGE_H */
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 720119b..17feae5 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -408,6 +408,52 @@ void pci_bridge_map_irq(PCIBridge *br, const char*
bus_name,
br->bus_name = bus_name;
}
+
+int pci_bridge_qemu_reserve_cap_init(PCIDevice *dev, int cap_offset,
+ uint32_t bus_reserve, uint64_t io_reserve,
+ uint32_t mem_non_pref_reserve,
+ uint32_t mem_pref_32_reserve,
+ uint64_t mem_pref_64_reserve,
+ Error **errp)
+{
+ if (mem_pref_32_reserve != (uint32_t)-1 &&
+ mem_pref_64_reserve != (uint64_t)-1) {
+ error_setg(errp,
+ "PCI resource reserve cap: PREF32 and PREF64 conflict");
+ return -EINVAL;
+ }
+
+ if (bus_reserve == (uint32_t)-1 &&
+ io_reserve == (uint64_t)-1 &&
+ mem_non_pref_reserve == (uint32_t)-1 &&
+ mem_pref_32_reserve == (uint32_t)-1 &&
+ mem_pref_64_reserve == (uint64_t)-1) {
+ return 0;
+ }
+
+ size_t cap_len = sizeof(PCIBridgeQemuCap);
+ PCIBridgeQemuCap cap = {
+ .len = cap_len,
+ .type = REDHAT_PCI_CAP_RESOURCE_RESERVE,
+ .bus_res = bus_reserve,
+ .io = io_reserve,
+ .mem = mem_non_pref_reserve,
+ .mem_pref_32 = mem_pref_32_reserve,
+ .mem_pref_64 = mem_pref_64_reserve
+ };
+
+ int offset = pci_add_capability(dev, PCI_CAP_ID_VNDR,
+ cap_offset, cap_len, errp);
+ if (offset < 0) {
+ return offset;
+ }
+
+ memcpy(dev->config + offset + PCI_CAP_FLAGS,
+ (char *)&cap + PCI_CAP_FLAGS,
+ cap_len - PCI_CAP_FLAGS);
+ return 0;
+}
+
static const TypeInfo pci_bridge_type_info = {
.name = TYPE_PCI_BRIDGE,
.parent = TYPE_PCI_DEVICE,
--
MST
- [Qemu-devel] [PULL 00/17] pc, pci, virtio: patches queued before 2.10, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 03/17] hw/acpi: Limit hotplug to root bus on legacy mode, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 04/17] hw/acpi: Move acpi_set_pci_info to pcihp, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 06/17] hw/pci: introduce pcie-pci-bridge device, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 05/17] Revert "ACPI: don't call acpi_pcihp_device_plug_cb on xen", Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 02/17] pc: add 2.11 machine types, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 08/17] hw/pci: add QEMU-specific PCI capability to the Generic PCI Express Root Port, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 07/17] hw/pci: introduce bridge-only vendor-specific capability to provide some hints to firmware,
Michael S. Tsirkin <=
- [Qemu-devel] [PULL 09/17] docs: update documentation considering PCIE-PCI bridge, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 11/17] acpi/vmgenid: change device category to misc, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 12/17] libvhost-user: support resuming vq->last_avail_idx based on used_idx, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 10/17] intel_iommu: fix missing BQL in pt fast path, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 13/17] vhost-user-bridge: fix resume regression (since 2.9), Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 14/17] vmgenid: replace x-write-pointer-available hack, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 15/17] pci: move check for existing devfn into new pci_bus_devfn_available() helper, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 16/17] pci: add reserved slot check to do_pci_register_device(), Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 17/17] fw_cfg: rename read callback, Michael S. Tsirkin, 2017/09/08
- [Qemu-devel] [PULL 01/17] vhost: Release memory references on cleanup, Michael S. Tsirkin, 2017/09/08