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[Qemu-devel] [PULL 08/18] xlnx-ep108: Rename to ZCU102
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 08/18] xlnx-ep108: Rename to ZCU102 |
Date: |
Thu, 14 Sep 2017 18:52:43 +0100 |
From: Alistair Francis <address@hidden>
The EP108 is a early access development board. Now that silicon is in
production people have access to the ZCU102. Let's rename the internal
QEMU files and variables to use the ZCU102.
There is no functional change here as the EP108 is still a valid board
option.
Signed-off-by: Alistair Francis <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/Makefile.objs | 2 +-
hw/arm/{xlnx-ep108.c => xlnx-zcu102.c} | 30 +++++++++++++++---------------
2 files changed, 16 insertions(+), 16 deletions(-)
rename hw/arm/{xlnx-ep108.c => xlnx-zcu102.c} (85%)
diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs
index a2e56ec..5ee6f7d 100644
--- a/hw/arm/Makefile.objs
+++ b/hw/arm/Makefile.objs
@@ -13,7 +13,7 @@ obj-y += omap1.o omap2.o strongarm.o
obj-$(CONFIG_ALLWINNER_A10) += allwinner-a10.o cubieboard.o
obj-$(CONFIG_RASPI) += bcm2835_peripherals.o bcm2836.o raspi.o
obj-$(CONFIG_STM32F205_SOC) += stm32f205_soc.o
-obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp.o xlnx-ep108.o
+obj-$(CONFIG_XLNX_ZYNQMP) += xlnx-zynqmp.o xlnx-zcu102.o
obj-$(CONFIG_FSL_IMX25) += fsl-imx25.o imx25_pdk.o
obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o
obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o
diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-zcu102.c
similarity index 85%
rename from hw/arm/xlnx-ep108.c
rename to hw/arm/xlnx-zcu102.c
index c339cd4..e9702ed 100644
--- a/hw/arm/xlnx-ep108.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -1,5 +1,5 @@
/*
- * Xilinx ZynqMP EP108 board
+ * Xilinx ZynqMP ZCU102 board
*
* Copyright (C) 2015 Xilinx Inc
* Written by Peter Crosthwaite <address@hidden>
@@ -25,16 +25,16 @@
#include "exec/address-spaces.h"
#include "qemu/log.h"
-typedef struct XlnxEP108 {
+typedef struct XlnxZCU102 {
XlnxZynqMPState soc;
MemoryRegion ddr_ram;
-} XlnxEP108;
+} XlnxZCU102;
-static struct arm_boot_info xlnx_ep108_binfo;
+static struct arm_boot_info xlnx_zcu102_binfo;
-static void xlnx_ep108_init(MachineState *machine)
+static void xlnx_zcu102_init(MachineState *machine)
{
- XlnxEP108 *s = g_new0(XlnxEP108, 1);
+ XlnxZCU102 *s = g_new0(XlnxZCU102, 1);
int i;
uint64_t ram_size = machine->ram_size;
@@ -47,7 +47,7 @@ static void xlnx_ep108_init(MachineState *machine)
}
if (ram_size < 0x08000000) {
- qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for EP108",
+ qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102",
ram_size);
}
@@ -108,18 +108,18 @@ static void xlnx_ep108_init(MachineState *machine)
/* TODO create and connect IDE devices for ide_drive_get() */
- xlnx_ep108_binfo.ram_size = ram_size;
- xlnx_ep108_binfo.kernel_filename = machine->kernel_filename;
- xlnx_ep108_binfo.kernel_cmdline = machine->kernel_cmdline;
- xlnx_ep108_binfo.initrd_filename = machine->initrd_filename;
- xlnx_ep108_binfo.loader_start = 0;
- arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_ep108_binfo);
+ xlnx_zcu102_binfo.ram_size = ram_size;
+ xlnx_zcu102_binfo.kernel_filename = machine->kernel_filename;
+ xlnx_zcu102_binfo.kernel_cmdline = machine->kernel_cmdline;
+ xlnx_zcu102_binfo.initrd_filename = machine->initrd_filename;
+ xlnx_zcu102_binfo.loader_start = 0;
+ arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
}
static void xlnx_ep108_machine_init(MachineClass *mc)
{
mc->desc = "Xilinx ZynqMP EP108 board";
- mc->init = xlnx_ep108_init;
+ mc->init = xlnx_zcu102_init;
mc->block_default_type = IF_IDE;
mc->units_per_default_bus = 1;
mc->ignore_memory_transaction_failures = true;
@@ -130,7 +130,7 @@ DEFINE_MACHINE("xlnx-ep108", xlnx_ep108_machine_init)
static void xlnx_zcu102_machine_init(MachineClass *mc)
{
mc->desc = "Xilinx ZynqMP ZCU102 board";
- mc->init = xlnx_ep108_init;
+ mc->init = xlnx_zcu102_init;
mc->block_default_type = IF_IDE;
mc->units_per_default_bus = 1;
mc->ignore_memory_transaction_failures = true;
--
2.7.4
- [Qemu-devel] [PULL 00/18] target-arm queue, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 01/18] target/arm: Use M_REG_NUM_BANKS rather than hardcoding 2, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 13/18] AArch64: Fix single stepping of ERET instruction, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 15/18] hw/pci-host/gpex: Set INTx index/gsi mapping, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 16/18] hw/arm/virt: Set INTx/gsi mapping, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 17/18] hw/pci-host/gpex: Implement PCI INTx routing, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 14/18] target/arm: Avoid an extra temporary for store_exclusive, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 08/18] xlnx-ep108: Rename to ZCU102,
Peter Maydell <=
- [Qemu-devel] [PULL 03/18] target/arm: Get PRECISERR and IBUSERR the right way round, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 06/18] target/arm: Add and use defines for EXCRET constants, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 04/18] nvic: Don't apply group priority mask to negative priorities, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 07/18] target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit(), Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 05/18] target/arm: Remove unnecessary '| 0xf0000000' from do_v7m_exception_exit(), Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 02/18] target/arm: Clear exclusive monitor on v7M reset, exception entry/exit, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 11/18] xlnx-zcu102: Add a machine level virtualization property, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 12/18] xlnx-zcu102: Mark the EP108 machine as deprecated, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 10/18] xlnx-zcu102: Add a machine level secure property, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 18/18] mps2-an511: Fix wiring of UART overflow interrupt lines, Peter Maydell, 2017/09/14