[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 04/18] nvic: Don't apply group priority mask to negat
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 04/18] nvic: Don't apply group priority mask to negative priorities |
Date: |
Thu, 14 Sep 2017 18:52:39 +0100 |
In several places we were unconditionally applying the
nvic_gprio_mask() to a priority value. This is incorrect
if the priority is one of the fixed negative priority
values (for NMI and HardFault), so don't do it.
This bug would have caused both NMI and HardFault to be
considered as the same priority and so NMI wouldn't
correctly preempt HardFault.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
---
hw/intc/armv7m_nvic.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 1fecfd6..d3e2056 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -152,8 +152,12 @@ static void nvic_recompute_state(NVICState *s)
}
}
+ if (active_prio > 0) {
+ active_prio &= nvic_gprio_mask(s);
+ }
+
s->vectpending = pend_irq;
- s->exception_prio = active_prio & nvic_gprio_mask(s);
+ s->exception_prio = active_prio;
trace_nvic_recompute_state(s->vectpending, s->exception_prio);
}
@@ -329,7 +333,10 @@ void armv7m_nvic_acknowledge_irq(void *opaque)
assert(vec->enabled);
assert(vec->pending);
- pendgroupprio = vec->prio & nvic_gprio_mask(s);
+ pendgroupprio = vec->prio;
+ if (pendgroupprio > 0) {
+ pendgroupprio &= nvic_gprio_mask(s);
+ }
assert(pendgroupprio < running);
trace_nvic_acknowledge_irq(pending, vec->prio);
--
2.7.4
- [Qemu-devel] [PULL 00/18] target-arm queue, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 01/18] target/arm: Use M_REG_NUM_BANKS rather than hardcoding 2, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 13/18] AArch64: Fix single stepping of ERET instruction, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 15/18] hw/pci-host/gpex: Set INTx index/gsi mapping, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 16/18] hw/arm/virt: Set INTx/gsi mapping, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 17/18] hw/pci-host/gpex: Implement PCI INTx routing, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 14/18] target/arm: Avoid an extra temporary for store_exclusive, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 08/18] xlnx-ep108: Rename to ZCU102, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 03/18] target/arm: Get PRECISERR and IBUSERR the right way round, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 06/18] target/arm: Add and use defines for EXCRET constants, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 04/18] nvic: Don't apply group priority mask to negative priorities,
Peter Maydell <=
- [Qemu-devel] [PULL 07/18] target/arm: Rename 'type' to 'excret' in do_v7m_exception_exit(), Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 05/18] target/arm: Remove unnecessary '| 0xf0000000' from do_v7m_exception_exit(), Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 02/18] target/arm: Clear exclusive monitor on v7M reset, exception entry/exit, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 11/18] xlnx-zcu102: Add a machine level virtualization property, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 12/18] xlnx-zcu102: Mark the EP108 machine as deprecated, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 10/18] xlnx-zcu102: Add a machine level secure property, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 18/18] mps2-an511: Fix wiring of UART overflow interrupt lines, Peter Maydell, 2017/09/14
- [Qemu-devel] [PULL 09/18] xlnx-zcu102: Manually create the machines, Peter Maydell, 2017/09/14
- Re: [Qemu-devel] [PULL 00/18] target-arm queue, Peter Maydell, 2017/09/15