Re: [Qemu-devel] [PATCH v2 3/3] s390x/tcg: add basic MSA features

[David Hildenbrand]

On 20.09.2017 15:23, Richard Henderson wrote:
> On 09/19/2017 02:36 PM, David Hildenbrand wrote:
>> On 19.09.2017 19:47, Richard Henderson wrote:
>>> On 09/19/2017 09:26 AM, David Hildenbrand wrote:
>>>> +    const uint8_t fc = env->regs[0] & 0x7fULL;
>>>
>>> Don't mask here...
>>
>> Bit 56 is the mod bit (see variable "mod") and is checked inside the
>> switch(). The function code really is just composed of bit 57 - 63, so
>> this is correct.
> 
> "mod bit"?
> 
>   # Bit 56 of general register 0 must be zero; oth-
>   # erwise, a specification exception is recognized.
> 
> I don't suppose this is a change in PoO v11?  I'm still looking at v10.
> 

I'm also looking at v10.

This bit is called "M" bit for all cpacf instructions that allow
en/decryption. M == modifier bit == mod bit == bit 56

e.g. for KM (7-56)

"When the modifier bit in general register 0 is one, a
decipher operation is performed. ...".

For instructions that don't allow switching between de/encryption (e.g.
KLMD), the modifier bit a.k.a. bit 56 must not be set.

I don't really see the need here to rename mod -> bit_56 here.

Thank!

-- 

Thanks,

David