[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-devel] [PATCH 0/5] OpenRISC SMP Support
From: |
Stafford Horne |
Subject: |
Re: [Qemu-devel] [PATCH 0/5] OpenRISC SMP Support |
Date: |
Sat, 7 Oct 2017 09:21:44 +0900 |
Hello,
Any takers on this? If not Ill consider sending a pull request
if/when the merge window is open.
-Stafford
On Wed, Aug 23, 2017 at 2:57 PM, Stafford Horne <address@hidden> wrote:
> Hello,
>
> This series adds SMP support for OpenRISC. The platform is based on the
> work that Stefan Kristiansson did around 2012 implemented in Verilog and
> run on FPGAs. I have been working to upstream this work, these are my QEMU
> patches I have been used to help with testing.
>
> I have documented the platform in the OpenRISC 1.2 specification proposal
> available here:
>
> https://github.com/stffrdhrn/doc/raw/arch-1.2-proposal/openrisc-arch-1.2-rev0.pdf
>
> My latest kernel patches are available here:
> https://github.com/stffrdhrn/linux.git openrisc-4.13-smp-qspinlock
>
> Stafford Horne (5):
> openrisc/ompic: Add OpenRISC Multicore PIC (OMPIC)
> target/openrisc: Make coreid and numcores configurable in state
> openrisc/cputimer: Perparation for Multicore
> openrisc: Initial SMP support
> openrisc: Only kick cpu on timeout, not on update
>
> default-configs/or1k-softmmu.mak | 1 +
> hw/intc/Makefile.objs | 1 +
> hw/intc/ompic.c | 179
> +++++++++++++++++++++++++++++++++++++++
> hw/openrisc/cputimer.c | 64 ++++++++++----
> hw/openrisc/openrisc_sim.c | 87 ++++++++++++++-----
> target/openrisc/cpu.c | 1 -
> target/openrisc/cpu.h | 7 +-
> target/openrisc/machine.c | 8 +-
> target/openrisc/sys_helper.c | 8 +-
> 9 files changed, 308 insertions(+), 48 deletions(-)
> create mode 100644 hw/intc/ompic.c
>
> --
> 2.13.5
>
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- Re: [Qemu-devel] [PATCH 0/5] OpenRISC SMP Support,
Stafford Horne <=