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[Qemu-devel] [PATCH 7/9] target-arm: Simplify insn_crosses_page()
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PATCH 7/9] target-arm: Simplify insn_crosses_page() |
Date: |
Mon, 9 Oct 2017 14:48:37 +0100 |
Recent changes have left insn_crosses_page() more complicated
than it needed to be:
* it's only called from thumb_tr_translate_insn() so we know
for certain that we're looking at a Thumb insn
* the caller's check for dc->pc >= dc->next_page_start - 3
means that dc->pc can't possibly be 4 aligned, so there's
no need to check that (the check was partly there to ensure
that we didn't treat an ARM insn as Thumb, I think)
* we now have thumb_insn_is_16bit() which lets us do a precise
check of the length of the next insn, rather than opencoding
an inaccurate check
Simplify it down to just loading the first half of the insn
and calling thumb_insn_is_16bit() on it.
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/translate.c | 27 ++++++---------------------
1 file changed, 6 insertions(+), 21 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 8d3203e..5838e67 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -11875,29 +11875,14 @@ static bool insn_crosses_page(CPUARMState *env,
DisasContext *s)
{
/* Return true if the insn at dc->pc might cross a page boundary.
* (False positives are OK, false negatives are not.)
+ * We know this is a Thumb insn, and our caller ensures we are
+ * only called if dc->pc is less than 4 bytes from the page
+ * boundary, so we cross the page if the first 16 bits indicate
+ * that this is a 32 bit insn.
*/
- uint16_t insn;
+ uint16_t insn = arm_lduw_code(env, s->pc, s->sctlr_b);
- if ((s->pc & 3) == 0) {
- /* At a 4-aligned address we can't be crossing a page */
- return false;
- }
-
- /* This must be a Thumb insn */
- insn = arm_lduw_code(env, s->pc, s->sctlr_b);
-
- if ((insn >> 11) >= 0x1d) {
- /* Top five bits 0b11101 / 0b11110 / 0b11111 : this is the
- * First half of a 32-bit Thumb insn. Thumb-1 cores might
- * end up actually treating this as two 16-bit insns (see the
- * code at the start of disas_thumb2_insn()) but we don't bother
- * to check for that as it is unlikely, and false positives here
- * are harmless.
- */
- return true;
- }
- /* Definitely a 16-bit insn, can't be crossing a page. */
- return false;
+ return !thumb_insn_is_16bit(s, insn);
}
static int arm_tr_init_disas_context(DisasContextBase *dcbase,
--
2.7.4
- [Qemu-devel] [PATCH 0/9] v8M: BLXNS, SG, secure function return, Peter Maydell, 2017/10/09
- [Qemu-devel] [PATCH 7/9] target-arm: Simplify insn_crosses_page(),
Peter Maydell <=
- [Qemu-devel] [PATCH 6/9] target/arm: Pull Thumb insn word loads up to top level, Peter Maydell, 2017/10/09
- [Qemu-devel] [PATCH 3/9] target/arm: Implement BLXNS, Peter Maydell, 2017/10/09
- [Qemu-devel] [PATCH 5/9] target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1, Peter Maydell, 2017/10/09
- [Qemu-devel] [PATCH 2/9] target/arm: Implement SG instruction, Peter Maydell, 2017/10/09
- [Qemu-devel] [PATCH 9/9] target/arm: Implement SG instruction corner cases, Peter Maydell, 2017/10/09