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Re: [Qemu-devel] [PATCH v2 19/24] ppc: pnv: use generic cpu_model parsin
From: |
David Gibson |
Subject: |
Re: [Qemu-devel] [PATCH v2 19/24] ppc: pnv: use generic cpu_model parsing |
Date: |
Tue, 10 Oct 2017 13:10:16 +1100 |
User-agent: |
Mutt/1.9.1 (2017-09-22) |
On Mon, Oct 09, 2017 at 09:51:06PM +0200, Igor Mammedov wrote:
> use common cpu_model prasing in vl.c and set default cpu_model
> using generic MachineClass::default_cpu_type.
>
> Beside of switching to generic infrastructure it solves several
> issues.
>
> * ppc_cpu_class_by_name() is used to deal with lower/upper case
> and alias translations into actual cpu type, which fixes
> '-M powernv -cpu power8' and '-M powernv -cpu power9_v1.0'
> usecases which error out with:
> 'invalid CPU model 'FOO' for powernv machine'
> * allows to switch to lower-case typenames in pnv chip/core name
> (by convention typnames should be lower-case)
> * replace aliased names /power8, power9, .../ with exact cpu model
> names (i.e. typenames should be stable but aliases might decide to
> point to other cpu model withi family or changed by kvm). It will
> also help to simplify pnv_chip/core code and get rid of dependency
> on cpu_model parsing.
>
> Signed-off-by: Igor Mammedov <address@hidden>
> Reviewed-by: Cédric Le Goater <address@hidden>
It wouldn't have had an actual patch collision, but this should have
the new power9 v2.0...
[...]
> -#define TYPE_PNV_CHIP_POWER9 TYPE_PNV_CHIP "-POWER9"
> +#define TYPE_PNV_CHIP_POWER9 TYPE_PNV_CHIP "-power9_v1.0"
> #define PNV_CHIP_POWER9(obj) \
> OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER9)
here
[...]
> @@ -781,7 +778,7 @@ static void pnv_chip_power9_class_init(ObjectClass
> *klass, void *data)
> DeviceClass *dc = DEVICE_CLASS(klass);
> PnvChipClass *k = PNV_CHIP_CLASS(klass);
>
> - k->cpu_model = "POWER9";
> + k->cpu_model = "power9_v1.0";
> k->chip_type = PNV_CHIP_POWER9;
> k->chip_cfam_id = 0x100d104980000000ull; /* P9 Nimbus DD1.0 */
> k->cores_mask = POWER9_CORE_MASK;
..and here..
> static const char *pnv_core_models[] = {
> - "POWER8E", "POWER8", "POWER8NVL", "POWER9"
> + "power8e_v2.1", "power8_v2.0", "power8nvl_v1.0", "power9_v1.0"
> };
..and here.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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- Re: [Qemu-devel] [PATCH v2 13/24] ppc: spapr: define core types statically, (continued)
- [Qemu-devel] [PATCH v2 14/24] ppc: spapr: use cpu type name directly, Igor Mammedov, 2017/10/09
- [Qemu-devel] [PATCH v2 15/24] ppc: spapr: register 'host' core type along with the rest of core types, Igor Mammedov, 2017/10/09
- [Qemu-devel] [PATCH v2 16/24] ppc: spapr: use cpu model names as tcg defaults instead of aliases, Igor Mammedov, 2017/10/09
- [Qemu-devel] [PATCH v2 17/24] ppc: move ppc_cpu_lookup_alias() before its first user, Igor Mammedov, 2017/10/09
- [Qemu-devel] [PATCH v2 18/24] ppc: spapr: use generic cpu_model parsing, Igor Mammedov, 2017/10/09
- [Qemu-devel] [PATCH v2 19/24] ppc: pnv: use generic cpu_model parsing, Igor Mammedov, 2017/10/09
- Re: [Qemu-devel] [PATCH v2 19/24] ppc: pnv: use generic cpu_model parsing,
David Gibson <=
- [Qemu-devel] [PATCH v2 20/24] ppc: pnv: normalize core/chip type names, Igor Mammedov, 2017/10/09
- [Qemu-devel] [PATCH v2 21/24] ppc: pnv: drop PnvCoreClass::cpu_oc field, Igor Mammedov, 2017/10/09
- [Qemu-devel] [PATCH v2 22/24] ppc: pnv: define core types statically, Igor Mammedov, 2017/10/09
- [Qemu-devel] [PATCH v2 24/24] ppc: pnv: consolidate type definitions and batch register them, Igor Mammedov, 2017/10/09
- [Qemu-devel] [PATCH v2 23/24] ppc: pnv: drop PnvChipClass::cpu_model field, Igor Mammedov, 2017/10/09
- Re: [Qemu-devel] [PATCH v2 00/24] generalize parsing of cpu_model (part 3/PPC), David Gibson, 2017/10/09