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[Qemu-devel] [PULL 11/26] pci: allow 32-bit PCI IO accesses to pass thro
From: |
Michael S. Tsirkin |
Subject: |
[Qemu-devel] [PULL 11/26] pci: allow 32-bit PCI IO accesses to pass through the PCI bridge |
Date: |
Sun, 15 Oct 2017 06:23:15 +0300 |
From: Mark Cave-Ayland <address@hidden>
Whilst the underlying PCI bridge implementation supports 32-bit PCI IO
accesses, unfortunately they are truncated at the legacy 64K limit.
Signed-off-by: Mark Cave-Ayland <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Reviewed-by: Michael S. Tsirkin <address@hidden>
Signed-off-by: Michael S. Tsirkin <address@hidden>
---
hw/pci/pci_bridge.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index 17feae5..a47d257 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -379,7 +379,8 @@ void pci_bridge_initfn(PCIDevice *dev, const char *typename)
sec_bus->address_space_mem = &br->address_space_mem;
memory_region_init(&br->address_space_mem, OBJECT(br), "pci_bridge_pci",
UINT64_MAX);
sec_bus->address_space_io = &br->address_space_io;
- memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io",
65536);
+ memory_region_init(&br->address_space_io, OBJECT(br), "pci_bridge_io",
+ UINT32_MAX);
br->windows = pci_bridge_region_init(br);
QLIST_INIT(&sec_bus->child);
QLIST_INSERT_HEAD(&parent->child, sec_bus, sibling);
--
MST
- [Qemu-devel] [PULL 01/26] xio3130_downstream: Report error if pcie_chassis_add_slot() failed, (continued)
- [Qemu-devel] [PULL 01/26] xio3130_downstream: Report error if pcie_chassis_add_slot() failed, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 02/26] pci: Set err to errp directly rather than through error_propagate(), Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 03/26] fw_cfg: add write callback, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 04/26] hw/misc: add vmcoreinfo device, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 05/26] dump: add guest ELF note, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 06/26] dump: update phys_base header field based on VMCOREINFO content, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 07/26] kdump: set vmcoreinfo location, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 08/26] scripts/dump-guest-memory.py: add vmcoreinfo, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 09/26] MAINTAINERS: add Dump maintainers, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 10/26] virtio/vhost: reset dev->log after syncing, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 11/26] pci: allow 32-bit PCI IO accesses to pass through the PCI bridge,
Michael S. Tsirkin <=
- [Qemu-devel] [PULL 12/26] hw/pci-bridge/pcie_pci_bridge: properly handle MSI unavailability case, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 13/26] virtio/pci/migration: Convert to VMState, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 14/26] PCI: PCIe access should always be little endian, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 15/26] pci: conventional-pci-device and pci-express-device interfaces, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 16/26] pci: Add interface names to hybrid PCI devices, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 17/26] pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 19/26] xen/pt: Mark TYPE_XEN_PT_DEVICE as hybrid, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 20/26] pci: Validate interfaces on base_class_init, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 21/26] hw/gen_pcie_root_port: make IO RO 0 on IO disabled, Michael S. Tsirkin, 2017/10/14
- [Qemu-devel] [PULL 22/26] virtio: fix descriptor counting in virtqueue_pop, Michael S. Tsirkin, 2017/10/14