[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH v6 33/50] target/sparc: check CF_PARALLEL instead of
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH v6 33/50] target/sparc: check CF_PARALLEL instead of parallel_cpus |
Date: |
Mon, 16 Oct 2017 10:25:52 -0700 |
From: "Emilio G. Cota" <address@hidden>
Thereby decoupling the resulting translated code from the current state
of the system.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Emilio G. Cota <address@hidden>
---
target/sparc/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 05414ce8a8..0669d4e8e5 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -2442,7 +2442,7 @@ static void gen_ldstub_asi(DisasContext *dc, TCGv dst,
TCGv addr, int insn)
default:
/* ??? In theory, this should be raise DAE_invalid_asi.
But the SS-20 roms do ldstuba [%l0] #ASI_M_CTL, %o1. */
- if (parallel_cpus) {
+ if (tb_cflags(dc->tb) & CF_PARALLEL) {
gen_helper_exit_atomic(cpu_env);
} else {
TCGv_i32 r_asi = tcg_const_i32(da.asi);
--
2.13.6
- [Qemu-devel] [PATCH v6 24/50] tcg: Add CPUState step_next_tb, (continued)
- [Qemu-devel] [PATCH v6 24/50] tcg: Add CPUState step_next_tb, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 22/50] tcg: define CF_PARALLEL and use it for TB hashing along with CF_COUNT_MASK, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 25/50] tcg: Include CF_COUNT_MASK in CF_HASH_MASK, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 27/50] target/arm: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 29/50] target/i386: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 28/50] target/hppa: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 26/50] tcg: convert tb->cflags reads to tb_cflags(tb), Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 30/50] target/m68k: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 33/50] target/sparc: check CF_PARALLEL instead of parallel_cpus,
Richard Henderson <=
- [Qemu-devel] [PATCH v6 31/50] target/s390x: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 32/50] target/sh4: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 35/50] cpu-exec: lookup/generate TB outside exclusive region during step_atomic, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 36/50] tcg: Add CF_LAST_IO + CF_USE_ICOUNT to CF_HASH_MASK, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 37/50] tcg: Remove CF_IGNORE_ICOUNT, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 34/50] tcg: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/16
- [Qemu-devel] [PATCH v6 38/50] translate-all: use a binary search tree to track TBs in TBContext, Richard Henderson, 2017/10/16