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[Qemu-devel] [PULL 05/29] exec: add page_mask for flatview_do_translate
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 05/29] exec: add page_mask for flatview_do_translate |
Date: |
Wed, 18 Oct 2017 18:11:57 +0200 |
From: Peter Xu <address@hidden>
The function is originally used for flatview_space_translate() and what
we care about most is (xlat, plen) range. However for iotlb requests, we
don't really care about "plen", but the size of the page that "xlat" is
located on. While, plen cannot really contain this information.
A simple example to show why "plen" is not good for IOTLB translations:
E.g., for huge pages, it is possible that guest mapped 1G huge page on
device side that used this GPA range:
0x100000000 - 0x13fffffff
Then let's say we want to translate one IOVA that finally mapped to GPA
0x13ffffe00 (which is located on this 1G huge page). Then here we'll
get:
(xlat, plen) = (0x13fffe00, 0x200)
So the IOTLB would be only covering a very small range since from
"plen" (which is 0x200 bytes) we cannot tell the size of the page.
Actually we can really know that this is a huge page - we just throw the
information away in flatview_do_translate().
This patch introduced "page_mask" optional parameter to capture that
page mask info. Also, I made "plen" an optional parameter as well, with
some comments for the whole function.
No functional change yet.
Signed-off-by: Peter Xu <address@hidden>
Signed-off-by: Maxime Coquelin <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
exec.c | 51 +++++++++++++++++++++++++++++++++++++++++++++------
1 file changed, 45 insertions(+), 6 deletions(-)
diff --git a/exec.c b/exec.c
index 6378714..ca520ac 100644
--- a/exec.c
+++ b/exec.c
@@ -465,11 +465,29 @@ address_space_translate_internal(AddressSpaceDispatch *d,
hwaddr addr, hwaddr *x
return section;
}
-/* Called from RCU critical section */
+/**
+ * flatview_do_translate - translate an address in FlatView
+ *
+ * @fv: the flat view that we want to translate on
+ * @addr: the address to be translated in above address space
+ * @xlat: the translated address offset within memory region. It
+ * cannot be @NULL.
+ * @plen_out: valid read/write length of the translated address. It
+ * can be @NULL when we don't care about it.
+ * @page_mask_out: page mask for the translated address. This
+ * should only be meaningful for IOMMU translated
+ * addresses, since there may be huge pages that this bit
+ * would tell. It can be @NULL if we don't care about it.
+ * @is_write: whether the translation operation is for write
+ * @is_mmio: whether this can be MMIO, set true if it can
+ *
+ * This function is called from RCU critical section
+ */
static MemoryRegionSection flatview_do_translate(FlatView *fv,
hwaddr addr,
hwaddr *xlat,
- hwaddr *plen,
+ hwaddr *plen_out,
+ hwaddr *page_mask_out,
bool is_write,
bool is_mmio,
AddressSpace **target_as)
@@ -478,11 +496,17 @@ static MemoryRegionSection flatview_do_translate(FlatView
*fv,
MemoryRegionSection *section;
IOMMUMemoryRegion *iommu_mr;
IOMMUMemoryRegionClass *imrc;
+ hwaddr page_mask = (hwaddr)(-1);
+ hwaddr plen = (hwaddr)(-1);
+
+ if (plen_out) {
+ plen = *plen_out;
+ }
for (;;) {
section = address_space_translate_internal(
flatview_to_dispatch(fv), addr, &addr,
- plen, is_mmio);
+ &plen, is_mmio);
iommu_mr = memory_region_get_iommu(section->mr);
if (!iommu_mr) {
@@ -494,7 +518,8 @@ static MemoryRegionSection flatview_do_translate(FlatView
*fv,
IOMMU_WO : IOMMU_RO);
addr = ((iotlb.translated_addr & ~iotlb.addr_mask)
| (addr & iotlb.addr_mask));
- *plen = MIN(*plen, (addr | iotlb.addr_mask) - addr + 1);
+ page_mask &= iotlb.addr_mask;
+ plen = MIN(plen, (addr | iotlb.addr_mask) - addr + 1);
if (!(iotlb.perm & (1 << is_write))) {
goto translate_fail;
}
@@ -505,6 +530,19 @@ static MemoryRegionSection flatview_do_translate(FlatView
*fv,
*xlat = addr;
+ if (page_mask == (hwaddr)(-1)) {
+ /* Not behind an IOMMU, use default page size. */
+ page_mask = ~TARGET_PAGE_MASK;
+ }
+
+ if (page_mask_out) {
+ *page_mask_out = page_mask;
+ }
+
+ if (plen_out) {
+ *plen_out = plen;
+ }
+
return *section;
translate_fail:
@@ -523,7 +561,7 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace
*as, hwaddr addr,
/* This can never be MMIO. */
section = flatview_do_translate(address_space_to_flatview(as), addr,
- &xlat, &plen, is_write, false, &as);
+ &xlat, &plen, NULL, is_write, false, &as);
/* Illegal translation */
if (section.mr == &io_mem_unassigned) {
@@ -567,7 +605,8 @@ MemoryRegion *flatview_translate(FlatView *fv, hwaddr addr,
hwaddr *xlat,
AddressSpace *as = NULL;
/* This can be MMIO, so setup MMIO bit. */
- section = flatview_do_translate(fv, addr, xlat, plen, is_write, true, &as);
+ section = flatview_do_translate(fv, addr, xlat, plen, NULL,
+ is_write, true, &as);
mr = section.mr;
if (xen_enabled() && memory_access_is_direct(mr, is_write)) {
--
1.8.3.1
- [Qemu-devel] [PULL 00/29] Misc patches for 2017-10-18, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 02/29] scsi-disk: support reporting of rotation rate, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 04/29] char: don't skip client cleanup if 'connected' flag is unset, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 01/29] checkpatch: refine mode selection, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 07/29] memory: fix off-by-one error in memory_region_notify_one(), Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 05/29] exec: add page_mask for flatview_do_translate,
Paolo Bonzini <=
- [Qemu-devel] [PULL 03/29] ide: support reporting of rotation rate, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 06/29] exec: simplify address_space_get_iotlb_entry, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 08/29] pc: make sure that plugged CPUs are of the same type, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 09/29] disas: Always initialize read_memory_inner_func properly, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 10/29] build: remove CONFIG_LIBDECNUMBER, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 13/29] tco: add trace events, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 11/29] nios2: define tcg_env, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 17/29] kvm: fix alignment of ram address, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 15/29] target/i386: trap on instructions longer than >15 bytes, Paolo Bonzini, 2017/10/18
- [Qemu-devel] [PULL 12/29] docs/devel/loads-stores.rst: Document our various load and store APIs, Paolo Bonzini, 2017/10/18