Re: [Qemu-devel] [PATCH v5 1/8] aspeed: use a ROM memory region to catch invalid writes

[Cédric Le Goater]

On 10/20/2017 05:10 AM, Philippe Mathieu-Daudé wrote:
> On 10/19/2017 12:44 PM, Peter Maydell wrote:
>> On 19 October 2017 at 16:12, Cédric Le Goater <address@hidden> wrote:
>>> Some legacy firmwares access unimplemented addresses on the Aspeed SoC
>>> (old U-Boot code using variables in the bss when it shouldn't do).
>>> Let's use a ROM memory region to catch the invalid writes and support
>>> new boards without using the 'ignore_memory_transaction_failures'
>>> flag.
>>>
>>> Signed-off-by: Cédric Le Goater <address@hidden>
>>> ---
>>>
>>>  Changes since v4 :
>>>
>>>  - use a ROM memory region
>>
>> Probably worth mentioning in the commit message that this
>> is a migration compatibility break for these boards.
> 
> What about the eeprom_buf from patch 6 "Add EEPROM I2C devices"?
> 
> My understanding is a migrated board would resume with a zeroized
> eeprom, is this the expected behaviour?

That would be probably the case. yes. As we don't populate the eeprom 
with VPD at machine init time and that migration is clearly not tested, 
I think we will address this issue later.  

Thanks,

C.