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[Qemu-devel] [PULL 32/51] target/sparc: check CF_PARALLEL instead of par
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PULL 32/51] target/sparc: check CF_PARALLEL instead of parallel_cpus |
Date: |
Wed, 25 Oct 2017 11:35:16 +0200 |
From: "Emilio G. Cota" <address@hidden>
Thereby decoupling the resulting translated code from the current state
of the system.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Emilio G. Cota <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/sparc/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index f2b5cdbf34..9dc41869a4 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -2437,7 +2437,7 @@ static void gen_ldstub_asi(DisasContext *dc, TCGv dst,
TCGv addr, int insn)
default:
/* ??? In theory, this should be raise DAE_invalid_asi.
But the SS-20 roms do ldstuba [%l0] #ASI_M_CTL, %o1. */
- if (parallel_cpus) {
+ if (tb_cflags(dc->tb) & CF_PARALLEL) {
gen_helper_exit_atomic(cpu_env);
} else {
TCGv_i32 r_asi = tcg_const_i32(da.asi);
--
2.13.6
- [Qemu-devel] [PULL 19/51] tcg: Remove TCGV_EQUAL*, (continued)
- [Qemu-devel] [PULL 19/51] tcg: Remove TCGV_EQUAL*, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 26/51] target/arm: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 27/51] target/hppa: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 28/51] target/i386: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 31/51] target/sh4: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 25/51] tcg: convert tb->cflags reads to tb_cflags(tb), Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 29/51] target/m68k: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 33/51] tcg: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 30/51] target/s390x: check CF_PARALLEL instead of parallel_cpus, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 34/51] cpu-exec: lookup/generate TB outside exclusive region during step_atomic, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 32/51] target/sparc: check CF_PARALLEL instead of parallel_cpus,
Richard Henderson <=
- [Qemu-devel] [PULL 35/51] tcg: Add CF_LAST_IO + CF_USE_ICOUNT to CF_HASH_MASK, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 39/51] translate-all: report correct avg host TB size, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 37/51] translate-all: use a binary search tree to track TBs in TBContext, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 36/51] tcg: Remove CF_IGNORE_ICOUNT, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 38/51] exec-all: rename tb_free to tb_remove, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 43/51] tcg: introduce **tcg_ctxs to keep track of all TCGContext's, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 42/51] gen-icount: fold exitreq_label into TCGContext, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 40/51] tcg: take tb_ctx out of TCGContext, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 44/51] tcg: distribute profiling counters across TCGContext's, Richard Henderson, 2017/10/25
- [Qemu-devel] [PULL 45/51] tcg: allocate optimizer temps with tcg_malloc, Richard Henderson, 2017/10/25