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Re: [Qemu-devel] [PATCHv4 01/13] sparc32_dma: rename SPARC32_DMA type to
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-devel] [PATCHv4 01/13] sparc32_dma: rename SPARC32_DMA type to SPARC32_DMA_DEVICE |
Date: |
Fri, 27 Oct 2017 13:27:57 -0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 |
On 10/25/2017 12:59 PM, Mark Cave-Ayland wrote:
> Also update the function names to match as appropriate. While we're
> here rename the type from sparc32_dma to sparc32-dma in order to
> match the current QOM convention.
>
> Signed-off-by: Mark Cave-Ayland <address@hidden>
> Reviewed-by: Artyom Tarasenko <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
> ---
> hw/dma/sparc32_dma.c | 67
> +++++++++++++++++++++++++-------------------------
> hw/sparc/sun4m.c | 2 +-
> 2 files changed, 35 insertions(+), 34 deletions(-)
>
> diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c
> index eb491b5..a8d31c1 100644
> --- a/hw/dma/sparc32_dma.c
> +++ b/hw/dma/sparc32_dma.c
> @@ -61,12 +61,13 @@
> /* XXX SCSI and ethernet should have different read-only bit masks */
> #define DMA_CSR_RO_MASK 0xfe000007
>
> -#define TYPE_SPARC32_DMA "sparc32_dma"
> -#define SPARC32_DMA(obj) OBJECT_CHECK(DMAState, (obj), TYPE_SPARC32_DMA)
> +#define TYPE_SPARC32_DMA_DEVICE "sparc32-dma-device"
> +#define SPARC32_DMA_DEVICE(obj) OBJECT_CHECK(DMADeviceState, (obj), \
> + TYPE_SPARC32_DMA_DEVICE)
>
> -typedef struct DMAState DMAState;
> +typedef struct DMADeviceState DMADeviceState;
>
> -struct DMAState {
> +struct DMADeviceState {
> SysBusDevice parent_obj;
>
> MemoryRegion iomem;
> @@ -86,7 +87,7 @@ enum {
> void ledma_memory_read(void *opaque, hwaddr addr,
> uint8_t *buf, int len, int do_bswap)
> {
> - DMAState *s = opaque;
> + DMADeviceState *s = opaque;
> int i;
>
> addr |= s->dmaregs[3];
> @@ -106,7 +107,7 @@ void ledma_memory_read(void *opaque, hwaddr addr,
> void ledma_memory_write(void *opaque, hwaddr addr,
> uint8_t *buf, int len, int do_bswap)
> {
> - DMAState *s = opaque;
> + DMADeviceState *s = opaque;
> int l, i;
> uint16_t tmp_buf[32];
>
> @@ -134,7 +135,7 @@ void ledma_memory_write(void *opaque, hwaddr addr,
>
> static void dma_set_irq(void *opaque, int irq, int level)
> {
> - DMAState *s = opaque;
> + DMADeviceState *s = opaque;
> if (level) {
> s->dmaregs[0] |= DMA_INTR;
> if (s->dmaregs[0] & DMA_INTREN) {
> @@ -154,7 +155,7 @@ static void dma_set_irq(void *opaque, int irq, int level)
>
> void espdma_memory_read(void *opaque, uint8_t *buf, int len)
> {
> - DMAState *s = opaque;
> + DMADeviceState *s = opaque;
>
> trace_espdma_memory_read(s->dmaregs[1]);
> sparc_iommu_memory_read(s->iommu, s->dmaregs[1], buf, len);
> @@ -163,7 +164,7 @@ void espdma_memory_read(void *opaque, uint8_t *buf, int
> len)
>
> void espdma_memory_write(void *opaque, uint8_t *buf, int len)
> {
> - DMAState *s = opaque;
> + DMADeviceState *s = opaque;
>
> trace_espdma_memory_write(s->dmaregs[1]);
> sparc_iommu_memory_write(s->iommu, s->dmaregs[1], buf, len);
> @@ -173,7 +174,7 @@ void espdma_memory_write(void *opaque, uint8_t *buf, int
> len)
> static uint64_t dma_mem_read(void *opaque, hwaddr addr,
> unsigned size)
> {
> - DMAState *s = opaque;
> + DMADeviceState *s = opaque;
> uint32_t saddr;
>
> if (s->is_ledma && (addr > DMA_MAX_REG_OFFSET)) {
> @@ -190,7 +191,7 @@ static uint64_t dma_mem_read(void *opaque, hwaddr addr,
> static void dma_mem_write(void *opaque, hwaddr addr,
> uint64_t val, unsigned size)
> {
> - DMAState *s = opaque;
> + DMADeviceState *s = opaque;
> uint32_t saddr;
>
> if (s->is_ledma && (addr > DMA_MAX_REG_OFFSET)) {
> @@ -252,28 +253,28 @@ static const MemoryRegionOps dma_mem_ops = {
> },
> };
>
> -static void dma_reset(DeviceState *d)
> +static void sparc32_dma_device_reset(DeviceState *d)
> {
> - DMAState *s = SPARC32_DMA(d);
> + DMADeviceState *s = SPARC32_DMA_DEVICE(d);
>
> memset(s->dmaregs, 0, DMA_SIZE);
> s->dmaregs[0] = DMA_VER;
> }
>
> -static const VMStateDescription vmstate_dma = {
> +static const VMStateDescription vmstate_sparc32_dma_device = {
> .name ="sparc32_dma",
> .version_id = 2,
> .minimum_version_id = 2,
> .fields = (VMStateField[]) {
> - VMSTATE_UINT32_ARRAY(dmaregs, DMAState, DMA_REGS),
> + VMSTATE_UINT32_ARRAY(dmaregs, DMADeviceState, DMA_REGS),
> VMSTATE_END_OF_LIST()
> }
> };
>
> -static void sparc32_dma_init(Object *obj)
> +static void sparc32_dma_device_init(Object *obj)
> {
> DeviceState *dev = DEVICE(obj);
> - DMAState *s = SPARC32_DMA(obj);
> + DMADeviceState *s = SPARC32_DMA_DEVICE(obj);
> SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
>
> sysbus_init_irq(sbd, &s->irq);
> @@ -284,9 +285,9 @@ static void sparc32_dma_init(Object *obj)
> qdev_init_gpio_out(dev, s->gpio, 2);
> }
>
> -static void sparc32_dma_realize(DeviceState *dev, Error **errp)
> +static void sparc32_dma_device_realize(DeviceState *dev, Error **errp)
> {
> - DMAState *s = SPARC32_DMA(dev);
> + DMADeviceState *s = SPARC32_DMA_DEVICE(dev);
> int reg_size;
>
> reg_size = s->is_ledma ? DMA_ETH_SIZE : DMA_SIZE;
> @@ -294,35 +295,35 @@ static void sparc32_dma_realize(DeviceState *dev, Error
> **errp)
> "dma", reg_size);
> }
>
> -static Property sparc32_dma_properties[] = {
> - DEFINE_PROP_PTR("iommu_opaque", DMAState, iommu),
> - DEFINE_PROP_UINT32("is_ledma", DMAState, is_ledma, 0),
> +static Property sparc32_dma_device_properties[] = {
> + DEFINE_PROP_PTR("iommu_opaque", DMADeviceState, iommu),
> + DEFINE_PROP_UINT32("is_ledma", DMADeviceState, is_ledma, 0),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> -static void sparc32_dma_class_init(ObjectClass *klass, void *data)
> +static void sparc32_dma_device_class_init(ObjectClass *klass, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(klass);
>
> - dc->reset = dma_reset;
> - dc->vmsd = &vmstate_dma;
> - dc->props = sparc32_dma_properties;
> - dc->realize = sparc32_dma_realize;
> + dc->reset = sparc32_dma_device_reset;
> + dc->vmsd = &vmstate_sparc32_dma_device;
> + dc->props = sparc32_dma_device_properties;
> + dc->realize = sparc32_dma_device_realize;
> /* Reason: pointer property "iommu_opaque" */
> dc->user_creatable = false;
> }
>
> -static const TypeInfo sparc32_dma_info = {
> - .name = TYPE_SPARC32_DMA,
> +static const TypeInfo sparc32_dma_device_info = {
> + .name = TYPE_SPARC32_DMA_DEVICE,
> .parent = TYPE_SYS_BUS_DEVICE,
> - .instance_size = sizeof(DMAState),
> - .instance_init = sparc32_dma_init,
> - .class_init = sparc32_dma_class_init,
> + .instance_size = sizeof(DMADeviceState),
> + .instance_init = sparc32_dma_device_init,
> + .class_init = sparc32_dma_device_class_init,
> };
>
> static void sparc32_dma_register_types(void)
> {
> - type_register_static(&sparc32_dma_info);
> + type_register_static(&sparc32_dma_device_info);
> }
>
> type_init(sparc32_dma_register_types)
> diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
> index e1bdd48..82c553c 100644
> --- a/hw/sparc/sun4m.c
> +++ b/hw/sparc/sun4m.c
> @@ -313,7 +313,7 @@ static void *sparc32_dma_init(hwaddr daddr, qemu_irq
> parent_irq,
> DeviceState *dev;
> SysBusDevice *s;
>
> - dev = qdev_create(NULL, "sparc32_dma");
> + dev = qdev_create(NULL, "sparc32-dma-device");
> qdev_prop_set_ptr(dev, "iommu_opaque", iommu);
> qdev_prop_set_uint32(dev, "is_ledma", is_ledma);
> qdev_init_nofail(dev);
>
- [Qemu-devel] [PATCHv4 00/13] sun4m: sparc32_dma tidy-ups, Mark Cave-Ayland, 2017/10/25
- [Qemu-devel] [PATCHv4 05/13] sun4m_iommu: move TYPE_SUN4M_IOMMU declaration to sun4m.h, Mark Cave-Ayland, 2017/10/25
- [Qemu-devel] [PATCHv4 02/13] sparc32_dma: split esp and le into separate DMA devices, Mark Cave-Ayland, 2017/10/25
- [Qemu-devel] [PATCHv4 07/13] esp: move TYPE_ESP and SysBusESPState from esp.c to esp.h, Mark Cave-Ayland, 2017/10/25
- [Qemu-devel] [PATCHv4 01/13] sparc32_dma: rename SPARC32_DMA type to SPARC32_DMA_DEVICE, Mark Cave-Ayland, 2017/10/25
- Re: [Qemu-devel] [PATCHv4 01/13] sparc32_dma: rename SPARC32_DMA type to SPARC32_DMA_DEVICE,
Philippe Mathieu-Daudé <=
- [Qemu-devel] [PATCHv4 04/13] sun4m: move DMA device wiring from sparc32_dma_init() to sun4m_hw_init(), Mark Cave-Ayland, 2017/10/25
- [Qemu-devel] [PATCHv4 09/13] lance: move TYPE_LANCE and SysBusPCNetState from lance.c to lance.h, Mark Cave-Ayland, 2017/10/25
- Re: [Qemu-devel] [PATCHv4 09/13] lance: move TYPE_LANCE and SysBusPCNetState from lance.c to lance.h, Peter Maydell, 2017/10/25
- Re: [Qemu-devel] [PATCHv4 09/13] lance: move TYPE_LANCE and SysBusPCNetState from lance.c to lance.h, Mark Cave-Ayland, 2017/10/26
- Re: [Qemu-devel] [PATCHv4 09/13] lance: move TYPE_LANCE and SysBusPCNetState from lance.c to lance.h, Mark Cave-Ayland, 2017/10/30
- Re: [Qemu-devel] [PATCHv4 09/13] lance: move TYPE_LANCE and SysBusPCNetState from lance.c to lance.h, Peter Maydell, 2017/10/30
- Re: [Qemu-devel] [PATCHv4 09/13] lance: move TYPE_LANCE and SysBusPCNetState from lance.c to lance.h, Mark Cave-Ayland, 2017/10/30
- Re: [Qemu-devel] [PATCHv4 09/13] lance: move TYPE_LANCE and SysBusPCNetState from lance.c to lance.h, Philippe Mathieu-Daudé, 2017/10/30
- Re: [Qemu-devel] [PATCHv4 09/13] lance: move TYPE_LANCE and SysBusPCNetState from lance.c to lance.h, Mark Cave-Ayland, 2017/10/30