Re: [Qemu-devel] [Qemu-arm] [PATCH v1 08/12] target/arm: Add ARM_FEATURE_V8_FCMA

[Alex Bennée]

Richard Henderson <address@hidden> writes:

As per previous nit about slightly more expansive commit comment.
Otherwise:

Reviewed-by: Alex Bennée <address@hidden>


> Signed-off-by: Richard Henderson <address@hidden>
> ---
>  target/arm/cpu.h     | 1 +
>  linux-user/elfload.c | 1 +
>  target/arm/cpu.c     | 1 +
>  target/arm/cpu64.c   | 1 +
>  4 files changed, 4 insertions(+)
>
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index c5c9cef834..fdf72534d0 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -1313,6 +1313,7 @@ enum arm_features {
>      ARM_FEATURE_M_SECURITY, /* M profile Security Extension */
>      ARM_FEATURE_JAZELLE, /* has (trivial) Jazelle implementation */
>      ARM_FEATURE_V8_1_SIMD, /* has ARMv8.1-SIMD */
> +    ARM_FEATURE_V8_FCMA, /* has complex number part of v8.3 extensions.  */
>  };
>
>  static inline int arm_feature(CPUARMState *env, int feature)
> diff --git a/linux-user/elfload.c b/linux-user/elfload.c
> index 003d9420b7..788e46229b 100644
> --- a/linux-user/elfload.c
> +++ b/linux-user/elfload.c
> @@ -541,6 +541,7 @@ static uint32_t get_elf_hwcap(void)
>      GET_FEATURE(ARM_FEATURE_V8_SHA256, ARM_HWCAP_A64_SHA2);
>      GET_FEATURE(ARM_FEATURE_CRC, ARM_HWCAP_A64_CRC32);
>      GET_FEATURE(ARM_FEATURE_V8_1_SIMD, ARM_HWCAP_A64_ASIMDRDM);
> +    GET_FEATURE(ARM_FEATURE_V8_FCMA, ARM_HWCAP_A64_FCMA);
>  #undef GET_FEATURE
>
>      return hwcaps;
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 276c996e9f..722d2806a7 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -1604,6 +1604,7 @@ static void arm_any_initfn(Object *obj)
>      set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
>      set_feature(&cpu->env, ARM_FEATURE_CRC);
>      set_feature(&cpu->env, ARM_FEATURE_V8_1_SIMD);
> +    set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
>      cpu->midr = 0xffffffff;
>  }
>  #endif
> diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
> index b05c904ad2..96320ac0d6 100644
> --- a/target/arm/cpu64.c
> +++ b/target/arm/cpu64.c
> @@ -227,6 +227,7 @@ static void aarch64_any_initfn(Object *obj)
>      set_feature(&cpu->env, ARM_FEATURE_V8_PMULL);
>      set_feature(&cpu->env, ARM_FEATURE_CRC);
>      set_feature(&cpu->env, ARM_FEATURE_V8_1_SIMD);
> +    set_feature(&cpu->env, ARM_FEATURE_V8_FCMA);
>      cpu->ctr = 0x80038003; /* 32 byte I and D cacheline size, VIPT icache */
>      cpu->dcz_blocksize = 7; /*  512 bytes */
>  }


--
Alex Bennée