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Re: [Qemu-devel] [PATCH 01/15] apb: move QOM macros and typedefs from ap
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From: |
Mark Cave-Ayland |
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Subject: |
Re: [Qemu-devel] [PATCH 01/15] apb: move QOM macros and typedefs from apb.c to apb.h |
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Date: |
Fri, 17 Nov 2017 15:40:05 +0000 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 |
On 17/11/17 14:24, Artyom Tarasenko wrote:
> Hi Mark,
>
> On Fri, Nov 17, 2017 at 2:42 PM, Mark Cave-Ayland
> <address@hidden> wrote:
>> This also includes the related IOMMUState typedef and defines.
>>
>> Signed-off-by: Mark Cave-Ayland <address@hidden>
>> ---
>> hw/pci-host/apb.c | 85
>> --------------------------------------------
>> include/hw/pci-host/apb.h | 86
>> +++++++++++++++++++++++++++++++++++++++++++++
>> 2 files changed, 86 insertions(+), 85 deletions(-)
>>
>> diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
>> index 64025cd..f743a4e 100644
>> --- a/hw/pci-host/apb.c
>> +++ b/hw/pci-host/apb.c
>> @@ -82,91 +82,6 @@ do { printf("IOMMU: " fmt , ## __VA_ARGS__); } while (0)
>> #define MAX_IVEC 0x40
>> #define NO_IRQ_REQUEST (MAX_IVEC + 1)
>>
>> -#define IOMMU_PAGE_SIZE_8K (1ULL << 13)
>> -#define IOMMU_PAGE_MASK_8K (~(IOMMU_PAGE_SIZE_8K - 1))
>> -#define IOMMU_PAGE_SIZE_64K (1ULL << 16)
>> -#define IOMMU_PAGE_MASK_64K (~(IOMMU_PAGE_SIZE_64K - 1))
>> -
>> -#define IOMMU_NREGS 3
>> -
>> -#define IOMMU_CTRL 0x0
>> -#define IOMMU_CTRL_TBW_SIZE (1ULL << 2)
>> -#define IOMMU_CTRL_MMU_EN (1ULL)
>> -
>> -#define IOMMU_CTRL_TSB_SHIFT 16
>> -
>> -#define IOMMU_BASE 0x8
>> -#define IOMMU_FLUSH 0x10
>> -
>> -#define IOMMU_TTE_DATA_V (1ULL << 63)
>> -#define IOMMU_TTE_DATA_SIZE (1ULL << 61)
>> -#define IOMMU_TTE_DATA_W (1ULL << 1)
>> -
>> -#define IOMMU_TTE_PHYS_MASK_8K 0x1ffffffe000ULL
>> -#define IOMMU_TTE_PHYS_MASK_64K 0x1ffffff8000ULL
>> -
>> -#define IOMMU_TSB_8K_OFFSET_MASK_8M 0x00000000007fe000ULL
>> -#define IOMMU_TSB_8K_OFFSET_MASK_16M 0x0000000000ffe000ULL
>> -#define IOMMU_TSB_8K_OFFSET_MASK_32M 0x0000000001ffe000ULL
>> -#define IOMMU_TSB_8K_OFFSET_MASK_64M 0x0000000003ffe000ULL
>> -#define IOMMU_TSB_8K_OFFSET_MASK_128M 0x0000000007ffe000ULL
>> -#define IOMMU_TSB_8K_OFFSET_MASK_256M 0x000000000fffe000ULL
>> -#define IOMMU_TSB_8K_OFFSET_MASK_512M 0x000000001fffe000ULL
>> -#define IOMMU_TSB_8K_OFFSET_MASK_1G 0x000000003fffe000ULL
>> -
>> -#define IOMMU_TSB_64K_OFFSET_MASK_64M 0x0000000003ff0000ULL
>> -#define IOMMU_TSB_64K_OFFSET_MASK_128M 0x0000000007ff0000ULL
>> -#define IOMMU_TSB_64K_OFFSET_MASK_256M 0x000000000fff0000ULL
>> -#define IOMMU_TSB_64K_OFFSET_MASK_512M 0x000000001fff0000ULL
>> -#define IOMMU_TSB_64K_OFFSET_MASK_1G 0x000000003fff0000ULL
>> -#define IOMMU_TSB_64K_OFFSET_MASK_2G 0x000000007fff0000ULL
>> -
>> -typedef struct IOMMUState {
>> - AddressSpace iommu_as;
>> - IOMMUMemoryRegion iommu;
>> -
>> - uint64_t regs[IOMMU_NREGS];
>> -} IOMMUState;
>> -
>> -#define TYPE_APB "pbm"
>> -
>> -#define APB_DEVICE(obj) \
>> - OBJECT_CHECK(APBState, (obj), TYPE_APB)
>> -
>> -#define TYPE_APB_IOMMU_MEMORY_REGION "pbm-iommu-memory-region"
>> -
>> -typedef struct APBState {
>> - PCIHostState parent_obj;
>> -
>> - MemoryRegion apb_config;
>> - MemoryRegion pci_config;
>> - MemoryRegion pci_mmio;
>> - MemoryRegion pci_ioport;
>> - uint64_t pci_irq_in;
>> - IOMMUState iommu;
>> - uint32_t pci_control[16];
>> - uint32_t pci_irq_map[8];
>> - uint32_t pci_err_irq_map[4];
>> - uint32_t obio_irq_map[32];
>> - qemu_irq *pbm_irqs;
>> - qemu_irq *ivec_irqs;
>> - unsigned int irq_request;
>> - uint32_t reset_control;
>> - unsigned int nr_resets;
>> -} APBState;
>> -
>> -#define TYPE_PBM_PCI_BRIDGE "pbm-bridge"
>> -#define PBM_PCI_BRIDGE(obj) \
>> - OBJECT_CHECK(PBMPCIBridge, (obj), TYPE_PBM_PCI_BRIDGE)
>> -
>> -typedef struct PBMPCIBridge {
>> - /*< private >*/
>> - PCIBridge parent_obj;
>> -
>> - /* Is this busA with in-built devices (ebus)? */
>> - bool busA;
>> -} PBMPCIBridge;
>> -
>> static inline void pbm_set_request(APBState *s, unsigned int irq_num)
>> {
>> APB_DPRINTF("%s: request irq %d\n", __func__, irq_num);
>> diff --git a/include/hw/pci-host/apb.h b/include/hw/pci-host/apb.h
>> index b19bd55..5d39c03 100644
>> --- a/include/hw/pci-host/apb.h
>> +++ b/include/hw/pci-host/apb.h
>> @@ -2,6 +2,92 @@
>> #define PCI_HOST_APB_H
>>
>> #include "qemu-common.h"
>> +#include "hw/pci/pci_host.h"
>> +
>> +#define IOMMU_NREGS 3
>> +
>> +#define IOMMU_PAGE_SIZE_8K (1ULL << 13)
>> +#define IOMMU_PAGE_MASK_8K (~(IOMMU_PAGE_SIZE_8K - 1))
>> +#define IOMMU_PAGE_SIZE_64K (1ULL << 16)
>> +#define IOMMU_PAGE_MASK_64K (~(IOMMU_PAGE_SIZE_64K - 1))
>> +
>> +#define IOMMU_CTRL 0x0
>> +#define IOMMU_CTRL_TBW_SIZE (1ULL << 2)
>> +#define IOMMU_CTRL_MMU_EN (1ULL)
>
> While at it, I think the naming for the model-specific constants
> should be more explicit.
> How about US2I_IOMMU_ or SABRE_IOMMU_?
I'm actually planning to follow this up with another patchset to split
out the IOMMU into a separate file (and QOM object) in a similar way to
sun4m_iommu.c so I can do it there rather than in this patchset if you
agree?
>> +
>> +#define IOMMU_CTRL_TSB_SHIFT 16
>> +
>> +#define IOMMU_BASE 0x8
>> +#define IOMMU_FLUSH 0x10
>> +
>> +#define IOMMU_TTE_DATA_V (1ULL << 63)
>> +#define IOMMU_TTE_DATA_SIZE (1ULL << 61)
>> +#define IOMMU_TTE_DATA_W (1ULL << 1)
>> +
>> +#define IOMMU_TTE_PHYS_MASK_8K 0x1ffffffe000ULL
>> +#define IOMMU_TTE_PHYS_MASK_64K 0x1ffffff8000ULL
>> +
>> +#define IOMMU_TSB_8K_OFFSET_MASK_8M 0x00000000007fe000ULL
>> +#define IOMMU_TSB_8K_OFFSET_MASK_16M 0x0000000000ffe000ULL
>> +#define IOMMU_TSB_8K_OFFSET_MASK_32M 0x0000000001ffe000ULL
>> +#define IOMMU_TSB_8K_OFFSET_MASK_64M 0x0000000003ffe000ULL
>> +#define IOMMU_TSB_8K_OFFSET_MASK_128M 0x0000000007ffe000ULL
>> +#define IOMMU_TSB_8K_OFFSET_MASK_256M 0x000000000fffe000ULL
>> +#define IOMMU_TSB_8K_OFFSET_MASK_512M 0x000000001fffe000ULL
>> +#define IOMMU_TSB_8K_OFFSET_MASK_1G 0x000000003fffe000ULL
>> +
>> +#define IOMMU_TSB_64K_OFFSET_MASK_64M 0x0000000003ff0000ULL
>> +#define IOMMU_TSB_64K_OFFSET_MASK_128M 0x0000000007ff0000ULL
>> +#define IOMMU_TSB_64K_OFFSET_MASK_256M 0x000000000fff0000ULL
>> +#define IOMMU_TSB_64K_OFFSET_MASK_512M 0x000000001fff0000ULL
>> +#define IOMMU_TSB_64K_OFFSET_MASK_1G 0x000000003fff0000ULL
>> +#define IOMMU_TSB_64K_OFFSET_MASK_2G 0x000000007fff0000ULL
>
> Maybe it's possible to compute the mask from the bits, similarly to
> how it's done in the Niagara model?
> If so, these defines would be not necessary.
Hmmm yes that could be possible as part of the follow-up patchset too (I
think I wrote this code several years ago). I'll have a look once these
patches are merged in their final form to see what the result looks like.
ATB,
Mark.