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Re: [Qemu-devel] [PATCH 12/15] ebus: wire up OBIO interrupts to APB pbm
From: |
Mark Cave-Ayland |
Subject: |
Re: [Qemu-devel] [PATCH 12/15] ebus: wire up OBIO interrupts to APB pbm via qdev GPIOs |
Date: |
Mon, 20 Nov 2017 22:47:23 +0000 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 |
On 20/11/17 01:02, Philippe Mathieu-Daudé wrote:
> Hi Mark,
>
> On 11/17/2017 10:42 AM, Mark Cave-Ayland wrote:
>> This enables us to remove the static array mapping in the ISA IRQ
>> handler (and the embedded reference to the APB device) by formalising
>> the interrupt wiring via the qdev GPIO API.
>>
>> For more clarity we replace the APB OBIO interrupt numbers with constants
>> designating the interrupt source, and rename isa_irq_handler() to
>> ebus_isa_irq_handler().
>>
>> Signed-off-by: Mark Cave-Ayland <address@hidden>
>> ---
>> hw/pci-host/apb.c | 2 +-
>> hw/sparc64/sun4u.c | 48
>> ++++++++++++++++++++++-----------------------
>> include/hw/pci-host/apb.h | 8 +++++++-
>> 3 files changed, 32 insertions(+), 26 deletions(-)
>>
>> diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c
>> index 268100e..f092780c 100644
>> --- a/hw/pci-host/apb.c
>> +++ b/hw/pci-host/apb.c
>> @@ -700,7 +700,7 @@ static void pci_pbm_init(Object *obj)
>> for (i = 0; i < 32; i++) {
>> s->obio_irq_map[i] = ((0x1f << 6) | 0x20) + i;
>> }
>> - s->pbm_irqs = qemu_allocate_irqs(pci_apb_set_irq, s, MAX_IVEC);
>> + qdev_init_gpio_in_named(DEVICE(s), pci_apb_set_irq, "pbm-irq",
>> MAX_IVEC);
>> qdev_init_gpio_out_named(DEVICE(s), s->ivec_irqs, "ivec-irq", MAX_IVEC);
>> s->irq_request = NO_IRQ_REQUEST;
>> s->pci_irq_in = 0ULL;
>> diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
>> index 0a30fb8..da386d3 100644
>> --- a/hw/sparc64/sun4u.c
>> +++ b/hw/sparc64/sun4u.c
>> @@ -86,6 +86,7 @@ typedef struct EbusState {
>> PCIDevice parent_obj;
>>
>> ISABus *isa_bus;
>> + qemu_irq isa_bus_irqs[16];
>
> Can you use ISA_NUM_IRQS here?
Ah yes, good spot. I've updated this (and the other occurrences you
found) to ISA_NUM_IRQS accordingly.
ATB,
Mark.
- Re: [Qemu-devel] [PATCH 08/15] apb: use gpios to wire up the apb device to the SPARC CPU IRQs, (continued)
- [Qemu-devel] [PATCH 09/15] apb: move the two secondary PCI bridges objects into APBState, Mark Cave-Ayland, 2017/11/17
- [Qemu-devel] [PATCH 11/15] apb: split pci_pbm_map_irq() into separate functions for bus A and bus B, Mark Cave-Ayland, 2017/11/17
- [Qemu-devel] [PATCH 12/15] ebus: wire up OBIO interrupts to APB pbm via qdev GPIOs, Mark Cave-Ayland, 2017/11/17
- [Qemu-devel] [PATCH 13/15] apb: replace OBIO interrupt numbers in pci_pbmA_map_irq() with constants, Mark Cave-Ayland, 2017/11/17
- [Qemu-devel] [PATCH 10/15] apb: remove pci_apb_init() and instantiate APB device using qdev, Mark Cave-Ayland, 2017/11/17
- [Qemu-devel] [PATCH 15/15] sun4u: switch from EBUS_DPRINTF() macro to trace-events, Mark Cave-Ayland, 2017/11/17
- [Qemu-devel] [PATCH 14/15] sparc64: introduce trace-events for hw/sparc64, Mark Cave-Ayland, 2017/11/17