[Qemu-devel] [PATCH 8/8] sun4u_iommu: add trace event for IOMMU translations

[Mark Cave-Ayland]

Signed-off-by: Mark Cave-Ayland <address@hidden>
---
 hw/sparc64/sun4u_iommu.c |    2 ++
 hw/sparc64/trace-events  |    1 +
 2 files changed, 3 insertions(+)

diff --git a/hw/sparc64/sun4u_iommu.c b/hw/sparc64/sun4u_iommu.c
index 51fbc39..4cf8e69 100644
--- a/hw/sparc64/sun4u_iommu.c
+++ b/hw/sparc64/sun4u_iommu.c
@@ -184,6 +184,8 @@ static IOMMUTLBEntry 
sun4u_translate_iommu(IOMMUMemoryRegion *iommu,
         ret.addr_mask = (IOMMU_PAGE_SIZE_8K - 1);
     }
 
+    trace_sun4u_iommu_translate(ret.iova, ret.translated_addr, tte);
+
     return ret;
 }
 
diff --git a/hw/sparc64/trace-events b/hw/sparc64/trace-events
index 052352f..2ee2d75 100644
--- a/hw/sparc64/trace-events
+++ b/hw/sparc64/trace-events
@@ -6,3 +6,4 @@ ebus_isa_irq_handler(int n, int level) "Set ISA IRQ %d level %d"
 # hw/sparc64/sun4u_iommu.c
 sun4u_iommu_mem_read(uint64_t addr, uint64_t val, int size) "addr: 0x%"PRIx64" 
val: 0x%"PRIx64" size: %d"
 sun4u_iommu_mem_write(uint64_t addr, uint64_t val, int size) "addr: 
0x%"PRIx64" val: 0x%"PRIx64" size: %d"
+sun4u_iommu_translate(uint64_t addr, uint64_t trans_addr, uint64_t tte) "xlate 
0x%"PRIx64" => pa 0x%"PRIx64" tte: 0x%"PRIx64
-- 
1.7.10.4