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Re: [Qemu-devel] [PATCH] display: check irq handler index before access
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH] display: check irq handler index before access |
Date: |
Mon, 11 Dec 2017 11:11:49 +0000 |
On 11 December 2017 at 10:55, P J P <address@hidden> wrote:
> From: Prasad J Pandit <address@hidden>
>
> The ctz32() routine could return value greater than
> TC6393XB_GPIOS=16. This could lead to an OOB array access.
> Add check to avoid it.
>
> Reported-by: Moguofang <address@hidden>
> Signed-off-by: Prasad J Pandit <address@hidden>
> ---
> hw/display/tc6393xb.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/hw/display/tc6393xb.c b/hw/display/tc6393xb.c
> index 74d10af3d4..78292cb847 100644
> --- a/hw/display/tc6393xb.c
> +++ b/hw/display/tc6393xb.c
> @@ -175,6 +175,10 @@ static void tc6393xb_gpio_handler_update(TC6393xbState
> *s)
>
> for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) {
> bit = ctz32(diff);
> + if (bit >= TC6393XB_GPIOS) {
> + fprintf(stderr, "TC6393xb: no GPIO pin %d\n", bit);
> + return;
> + }
> qemu_set_irq(s->handler[bit], (level >> bit) & 1);
> }
It would be more sensible to just mask off the top bits of
'level' before starting the loop, rather than checking every
time around the loop:
level &= MAKE_64BIT_MASK(0, TC6493XB_GPIOS);
Also, if we want to warn about the guest having set a GPIO
bit we don't implement this isn't the best place to do it --
it would make more sense to do that only if the guest writes
something non-zero to SCR_GPO_DSR(2), and as an LOG_UNIMP warning.
But I don't think it's worth the effort since this is only used
on the ancient 'tosa' board.
thanks
-- PMM