[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 22/43] target/arm: Create new arm_v7m_mmu_idx_for_sec
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 22/43] target/arm: Create new arm_v7m_mmu_idx_for_secstate_and_priv() |
Date: |
Wed, 13 Dec 2017 18:12:20 +0000 |
The TT instruction is going to need to look up the MMU index
for a specified security and privilege state. Refactor the
existing arm_v7m_mmu_idx_for_secstate() into a version that
lets you specify the privilege state and one that uses the
current state of the CPU.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
---
target/arm/cpu.h | 21 ++++++++++++++++-----
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index c42d62d..9631670 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2339,14 +2339,16 @@ static inline int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx)
}
}
-/* Return the MMU index for a v7M CPU in the specified security state */
-static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env,
- bool secstate)
+/* Return the MMU index for a v7M CPU in the specified security and
+ * privilege state
+ */
+static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate_and_priv(CPUARMState *env,
+ bool secstate,
+ bool priv)
{
- int el = arm_current_el(env);
ARMMMUIdx mmu_idx = ARM_MMU_IDX_M;
- if (el != 0) {
+ if (priv) {
mmu_idx |= ARM_MMU_IDX_M_PRIV;
}
@@ -2361,6 +2363,15 @@ static inline ARMMMUIdx
arm_v7m_mmu_idx_for_secstate(CPUARMState *env,
return mmu_idx;
}
+/* Return the MMU index for a v7M CPU in the specified security state */
+static inline ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env,
+ bool secstate)
+{
+ bool priv = arm_current_el(env) != 0;
+
+ return arm_v7m_mmu_idx_for_secstate_and_priv(env, secstate, priv);
+}
+
/* Determine the current mmu_idx to use for normal loads/stores */
static inline int cpu_mmu_index(CPUARMState *env, bool ifetch)
{
--
2.7.4
- [Qemu-devel] [PULL 15/43] hw/intc/arm_gicv3_its: Implement a minimalist reset, (continued)
- [Qemu-devel] [PULL 15/43] hw/intc/arm_gicv3_its: Implement a minimalist reset, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 20/43] target/arm: Add missing M profile case to regime_is_user(), Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 08/43] xilinx_spips: Make tx/rx_data_bytes more generic and reusable, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 07/43] xilinx_spips: Add support for RX discard and RX drain, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 10/43] xilinx_spips: Add support for 4 byte addresses in the LQSPI, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 17/43] hw/intc/arm_gicv3_its: Implement full reset, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 18/43] target/arm: Handle SPSEL and current stack being out of sync in MSP/PSP reads, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 12/43] xilinx_spips: Add support for the ZynqMP Generic QSPI, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 13/43] xlnx-zcu102: Add support for the ZynqMP QSPI, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 21/43] target/arm: Split M profile MNegPri mmu index into user and priv, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 22/43] target/arm: Create new arm_v7m_mmu_idx_for_secstate_and_priv(),
Peter Maydell <=
- [Qemu-devel] [PULL 25/43] target/arm: Provide fault type enum and FSR conversion functions, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 27/43] target/arm: Convert get_phys_addr_v5() to not return FSC values, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 23/43] target/arm: Factor MPU lookup code out of get_phys_addr_pmsav8(), Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 30/43] target/arm: Convert get_phys_addr_pmsav5() to not return FSC values, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 29/43] target/arm: Convert get_phys_addr_lpae() to not return FSC values, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 28/43] target/arm: Convert get_phys_addr_v6() to not return FSC values, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 24/43] target/arm: Implement TT instruction, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 31/43] target/arm: Convert get_phys_addr_pmsav7() to not return FSC values, Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 26/43] target/arm: Remove fsr argument from arm_ld*_ptw(), Peter Maydell, 2017/12/13
- [Qemu-devel] [PULL 16/43] linux-headers: update to 4.15-rc1, Peter Maydell, 2017/12/13