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Re: [Qemu-devel] [PATCH v1 05/19] include/fpu/softfloat: add some float1
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-devel] [PATCH v1 05/19] include/fpu/softfloat: add some float16 contants |
Date: |
Fri, 15 Dec 2017 10:37:33 -0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 |
Hi Alex,
On 12/11/2017 09:56 AM, Alex Bennée wrote:
> This defines the same set of common constants for float 16 as defined
> for 32 and 64 bit floats. These are often used by target helper
> functions.
>
> Signed-off-by: Alex Bennée <address@hidden>
> ---
> include/fpu/softfloat.h | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h
> index 17dfe60dbd..5a9258c57c 100644
> --- a/include/fpu/softfloat.h
> +++ b/include/fpu/softfloat.h
> @@ -395,6 +395,13 @@ static inline float16 float16_set_sign(float16 a, int
> sign)
> return make_float16((float16_val(a) & 0x7fff) | (sign << 15));
> }
>
> +#define float16_zero make_float16(0)
ok
> +#define float16_one make_float16(0x3a00)
I'm a bit confused...
>>> [np.fromstring(struct.pack("<H", x), dtype=np.float16)[0] for x in
[0, 0x3a00, 0x34d1, 0x4448, 0x3800, 0x7a00]]
[0.0, 0.75, 0.30103, 4.2812, 0.5, 49152.0]
However:
>>> ['0x' + binascii.hexlify(np.array([x], '>f2').tostring()) for x in
[0, 1, math.log(2), np.pi, 0.5, np.inf]]
['0x0000', '0x3c00', '0x398c', '0x4248', '0x3800', '0x7c00']
It seems the MSB bit of the mantissa got shifted as the LSB of the
biased exponent...
> +#define float16_ln2 make_float16(0x34d1)
incorrect? 0x398c
> +#define float16_pi make_float16(0x4448)
incorrect? 0x4248
> +#define float16_half make_float16(0x3800)
ok
> +#define float16_infinity make_float16(0x7a00)
incorrect? 0x7c00
> +
>
> /*----------------------------------------------------------------------------
> | The pattern for a default generated half-precision NaN.
>
> *----------------------------------------------------------------------------*/
>
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- [Qemu-devel] [PATCH v1 00/19] re-factor softfloat and add fp16 functions, Alex Bennée, 2017/12/11
- [Qemu-devel] [PATCH v1 02/19] include/fpu/softfloat: implement float16_abs helper, Alex Bennée, 2017/12/11
- [Qemu-devel] [PATCH v1 03/19] include/fpu/softfloat: implement float16_chs helper, Alex Bennée, 2017/12/11
- [Qemu-devel] [PATCH v1 01/19] fpu/softfloat: implement float16_squash_input_denormal, Alex Bennée, 2017/12/11
- [Qemu-devel] [PATCH v1 05/19] include/fpu/softfloat: add some float16 contants, Alex Bennée, 2017/12/11
- [Qemu-devel] [PATCH v1 06/19] fpu/softfloat: propagate signalling NaNs in MINMAX, Alex Bennée, 2017/12/11
- [Qemu-devel] [PATCH v1 04/19] include/fpu/softfloat: implement float16_set_sign helper, Alex Bennée, 2017/12/11
- [Qemu-devel] [PATCH v1 08/19] fpu/softfloat: move the extract functions to the top of the file, Alex Bennée, 2017/12/11
- [Qemu-devel] [PATCH v1 07/19] fpu/softfloat: improve comments on ARM NaN propagation, Alex Bennée, 2017/12/11